CoCoZilla Page NoCan3 Page NoCan2 Page Bottom Connector Page MPI Clone Page IDEZilla Page Pocket IDE Page 512K Schematic, BIG 828 x 1114. MFM HardDrive Page 4MHZ Page PLCC 6309 Page
Make a NitrOS-9 Boot Disk. NoCan3 Information Page Address Selection Page Pocket IDE Photos 4MHz PCB Page
Frequently Asked Questions NoCan3 Circuit Board Page NoCan2 PCB Page IDE PCB Page
I2C Page NoCan3 Jumpers Page NoCan2 Jumpers Page IDE CHS Driver Page
Update Your 26-3024 MPI for CoCo-3 Use Auto-Refresh No Excuses List IDE LBA Driver Page
HiDensity Modifications HiDensity Mod Text FIle
NoCan3 with I2C Bus Bart GIF Page Get the 26-3024 UpGrade GAL MPI 26-3124 UpGrade Page Back to the Thumbnail Page


Click Big View, 1318 x 789, Before Fab.As they come from Board Fab.One Board, in Hand!Almost ready to test!

Rev B of NoCan3: This may be the final NoCan3 design, NoCan3-B. Testing will tell the story, and it all works.
No basic electronic changes. Plenty of layout changes, especially the BLKx jumper positions.

Folks are suggesting that another MAX232 be added to allow all RS-232 pins accessable (except RI). Give me feedback on this:



Note: For those of you who want to use your MPI in a re-pack situation, the 16550/6551 and the 6821 MUST be addressed
in either $FF1x or $FF3x. Any other locations cause conflict with the data bus buffer on the MPI. One will eventually win, while the other will die (MPI verses chips) not good. My drivers currently put the 16550 into the $FF10-7 range (good), the 6821 into the $FF60-3 range (bad), the 6551 into the $FF64-7 range (bad). The 6821 can be moved just by changing the appropriate jumpers and using this command (in OS9) DMODE /LPT1 HPA=FF1F and saving that descriptor. The 6551 needs re-jumpering and driver and descriptor need re-assembling (which I will re-assemble).


The next options are available and will come installed:

    (For the Lattice-2096 boards that are out there, this can be added)

1. It has $FF90 Bit 3 toggling (Vector page @ $FFEX), it fits into the CPLD. This mirrors the GIME bit and sets the CPLD accordingly.
    (Curtis, you have this.)



2. New Register: $FF96
    Write-Only Bits 0 to 2.
    Any system changes zeroes out this register, for instance booting OS9, NitrOS-9 or
        going back to RS-DOS, clears this register.
    Pushing the RESET switch zeroes out this register.

Bit 0: 4MHz enable, disable.
    FAST jumper must be installed (4mhz = OFF) to set or reset the 4MHz bit in software.
    0 = off, no 4MHz.
    1 = on, 4MHz on, but only if in 2MHz mode already.

Bit 1: Changes the 4MHz cycle from short to long.
    0 = Two cycles. Balanced fit between Q & E.
    1 = Three cycles. UnBalanced fit. Makes E a little bit shorter, Q unchanged from Two cycle setting.
        Either 2 cycles of 28MHz or 3 cycles of 28MHz in length. 34.9206ns per cycle.
            short, 2 cycles = 7.159MHz. This is the frequency of the waveform, not the through-put.
            long,  3 cycles = 4.772MHz. ditto.

Bit 2: Turbo Phase.
    Has the ability to shift the Turbo. This may help others' coco's to use the Turbo mode.
    0 = Normal.
    1 = Shift.
        What does this do?
            It moves the Turbo position. Moves it right or left depending on which GIME you have.



You'll notice that a prototype of 4MB simms are on top of the image. This is so that I can remove upd4217400 type DRAMS from a 72-pinner and make my own 4MB simms. See this page for more info: DRAMS I'll let you know how this home-brew SIMM venture works. They are almost too thick to plug in.
Flash: The 4MB homebrew SIMMs work great! The -WR line was missing, but after fixing that, they work.


This page modified 2000/05/25.
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