This page updated 2000/01/03
Lattice PLD's
Are CMOS
Programmable
Logic
Devices
and are basically a giant PAL. They draw only a small amount of current,
0.08A. Each board has one Lattice CPLD on it. The CPLD does all of the
address decoding, address selection, latches, buffers, outputs, etc. for
each board. I choose them because the development kit is inexpensive, the
parts are in-circuit-programmable and are around $7.00 to $15.00. The CPLD
devices used are rated at about 80MHz.
Information about NoCan3-B
NoCan3-B
is a catch-all board. It has the 8-megs interface, choice of 1 serial port
- 6551 or 16550, 1 parallel port - 6821, 44MHz circuit with on/off connection
and full cpu buffers. This board is designed to go over the top of the
metal RF can. It installs using IC1, IC3, CN4, CN5 and CN6 for the connections
and a 3-wire flying cable.This puts it kinda high inside of a coco-3 case,
and may be better for a re-pack. You could leave out the serial and parallel
stuff and just use 2-megs or 8-megs, that could be a choice. The 3-wire
cable is HSync & VSync (IC15, pins 13 and 11) and one end of R63 for
the 28MHz. The coco-3 power supply does handle this board with everything
installed but the heatsink gets really hot and needs a FAN!
No software changes are needed to run and boot NitrOS-9, although for OS9
the system always needs patching.
The included "4MHz" circuit may not work on all coco-3's, although I've been using it regularly, booting NitrOS-9 from a floppy at "4MHz". It doesn't work with 68B09E's, but does with 63B09E or 63C09E's. It possibly won't work at all with the "32MHz Crystal Hack" but I have tested it at 31MHz by accident. If it did work, the 63x09E would then be running at about 5.17MHz burst. The original coco-3's 28.63636MHz clock is used to generate the "4MHz" and actually comes out to 4.77MHz and has Q and E at 66% overlap. Creating the "4MHz" was easy to do it using the coco's clock and it keeps the signals all in "sync". The Lattice chip will run at 80MHz, so the slug is the CPU. The "4MHz" circuit actually puts out a single Q & E burst between system Q & E's, but only when memory is not going to be used next. Check out SockMaster's website for more details.
This circuit board can be used for OS9 or NitrOS9. IC1 and IC3 must be replaced with sockets, add a 2-pin header to IC15 and a 1-pin header to R63. That's all of the mods needed to the motherboard. After that, it's just a piggy-back memory board. Cut loose four caps (C10, C11, C65, C66) on the motherboard for RAS & CAS and for E & Q. My coco-3 is standard, no other chips replaced, especially the three 74LS244's and the 74LS374 in the data path to the GIME. I did upgrade the 74LS245 to a 74F245. Am considering going to all 74ACxxx type buffers.
A portion of SockMaster's 4MHz circuit concept (with his permission) is now inside of the NoCan3 Lattice CPLD.
1. Does this board work everytime that I turn
my coco on ?
So far, everytime that I run NitrOS-9, it works.
Haven't had any problems with it not running from power-up. Don't have
to hit "RESET" to get things to work.
2. When is this board available ?
Now, although there's only two or three people interested.
Maybe the addition of 8MB and the choice of serial ports will help get
more interest going.
Information about IdeZilla and
Pocket-IDE
IdeZilla is an IDE interface to coco's 1 2 or
3. Pocket IDE is for coco-3's only, although it will work on other coco's
if you have the correct connection. Pocket-IDE requires a custom installation.
You can use NitrOS-9, OS9 or any other operating system you choose, even
RS-DOS. However, RS-DOS doesn't know about IDE and you'll have to create
your own driver, or get one from a website. This board can be set-up to
look like (software-wise) the Glenside IDE board addressing, with maybe
the exception of the alternate IDE registers ($3F6 & $3F7). It has
a standard TIN (not gold) card edge connector. The board can be modified
to be "remote" by cutting loose the front header part of the circuit board,
(between the two headers) and installing any length (up to 8") 40 pin cable.
I used an IDE cable for this extension because there are plenty of them
to go around and they are cheap and already have 40 pins. Also, if you
choose to implement the "bottom connector" scheme, then this board is ready
to go by connecting to the second header on this board and ignoring the
card edge front end header. No part of this interface is "hot-pluggable".
1. What is this IDE board compatible with?
A few folks have asked how
fast this board is and is it compatible with "what" drives. So far, it's
compatible with any ATA drive, including older drives that are CHS mode
only. It even works with those Kittyhawk drives, I have two. How fast is
a function of how fast your driver or OS is. The Lattice PLD is a 80MHz
part, so I don't expect that any coco can get anywhere near that speed.
For myself, I have had megaread times (TIME;MEGAREAD </DD@;TIME) of
approximately 13-16 seconds (even shorter with "4MHz"), BUT -- the
drive had a driver that only used 256 bytes of every sector, ignoring the
upper 8 bits of every IDE word. Megaread times of approximately 25-30 seconds
are common (for me) under NitrOS9 v200n using a 512-byte driver.
2. When is this IDE board available?
For now, it is not. It depends on the Glenside Computer
Club and when they release their IDE project to the community. They asked
me to wait, unless folks want this board now.
Information about CoCoZilla
CoCoZilla, recently named by Bill Clemons, was
created around 1985 or so. Didn’t have the bucks to buy a real one, but
had the tools and services to create one from scratch, which was at the
time, cheaper. Procured a custom wirewrap board and push-in socket pins
for this project. Next was to create a schematic that could be yellow-markered
as I went along to mark progress. Started with the coco-3 and added full
buffering. Then the pseudo-MPI was added. Didn’t want the “switch” but
wanted functionality, so the MPI got full buffering also. Then the next
challenge was how to physically address the MPI bus separate from the coco
bus. I used 20L8 pals for that job, as I wanted the $FF1X and $FF3X ranges
added to the MPI. At the time, the 2-megs circuit was already in progress
and since that would be a nice addition, started conversing with Kevin
Darling for his knowledge of the same. With that running, next began the
idea of mass storage. First to be added was the floppy interface, worked
right away, amazing. I used to think on how nice it would be to have IDE
drives instead of those MFM drives, but started on the MFM’s, as they were
available. Came up with a WDXT PC circuit board, added an IBM XT slot to
cocozilla along with another PAL for system addressing of PC cards. I kept
the idea of IDE for later. Then came OS9, something that was purchased
from a Tandy. Then got the Development Pak from Alan Dages. Upgraded the
cocozilla memory from 512 to 1 megs, everything worked so far. Just this
(1998) year, a chassis was found that could take that wirewrap board and
all of the MFM, IDE, floppy drives that could be thrown at it, and upgraded
to 2-megs. I later found out that it was an Intel Magellan chassis, from
the designer. The chassis has room for as many as 8 drives of any kind,
4 visible and 4 inside.
This page updated 2000/01/03