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We are using VHDL in conjunction with Vivado (a Xilinx IDE) to create a 16-bit Soft-CPU. We hope to implement our designs onto a Kintex 7 FPGA found on some of the nodes on the ORBIT Grid

A Zilog Z80, a small 16-bit IC CPU

A sample waveform generated using Vivado (a 4-bit adder)