Our project involves the design of a 16-bit software defined CPU and surrounding components (RAM, Input and Output Logic, etc). We are using VHDL to code our components onto an FPGA. The CPU will be capable of performing basic operations on floating point numbers with Binary Offest Encoding

This is a baseline chart describing the flow of data for our CPU project

This was a problem we encountered with the shifting mechanism (it would shift infinitely) as you can see with the continously escalating waves

Problem corrected for with an additional control variable