Vikas S. Shah

 

Result oriented professional with a unique combination of system analysis, software architecture, and leadership experiences in global technology driven industry. Possess an in-depth understanding of emerging technologies in addition to their commercial applications. Extensive involvement providing strategic solutions to multinational clients. Demonstrated ability to communicate among teams as well as customer to an extend of promoting products/services. Success planning besides directing activities that delivers innovative information technology, telecommunication, and customer service solutions. Background includes international travel to the length of exposure to different cultures.

 

 

·         System analysis and design ·         Software engineering principles ·         Enterprise Software Architecture ·         Embedded and real-time systems ·         Network  protocols

·         Risk management and Quality assurance ·         Software Configuration Management ·         Customer relationship management (CRM) ·         Team building and Engineering Management ·         Business intelligence and Project Planning

 

 

Education	Master of Science - Worcester Polytechnic Institute  Computer Science Worcester, MA, USA - (1996 - 1998)
	Bachelor of Engineering - University Of Bombay Computer Engineering, Bombay, India - (1991 - 1995)
Publications	·         Service Oriented Real-Time Enterprise Content Management – In Association with Business Process Integration, International Conference on Enterprise Information Systems 2007, June 2007. ·         Managing Density of Requirements during ION Product Development, IEEE – International Engineering Management Conference 2005, Sept 2005 ·         Process Management during Real-time Enterprise Information Integration, International Association for Management of Technology 2005, May 2005 ·         Model Driven Architecture Based REI - An approach and impact on businesses, International Conference on Enterprise Information Systems 2005, May 2005 ·         Essential Characteristics of Process Transformation in REI, Information Resources Management Association 2005, Apr 2005 ·         Real-Time Enterprises Development Features with Anticipation of Information Change: Preliminary Findings, IFIP 8.2 Organizations and Society in Information Systems 2004, Dec 2004 ·         Dynamic Behavior of Micro-architecture Based Network Processor’s Data Plane Feature Components, International Conference on Information Networking 2004, Feb 2004 ·         Layered Architecture Based Embedded System Software Development of Network Processor’s Feature Applications, ACM Winter International Symposium on Information and Communication Technologies 2004, Jan 2004
IT Certification & Training	CRA - SR&ED: Scientific Research and Experimental Development Program. KPMG: Capability Maturity Model Level 5. Wind River System: VxWorks, Tornado, and BSP packages. Rational: Rose Model (RM) and Unified Modeling Language (UML). Sycamore Network: SN6000, SN8000, SN16000, DWDM - OC48, OC192.

 

CAREER PROGRESSION

 

Product Architect – Sr. Manager (06/06–Present)

Sortes Technologies Inc., Brampton, ON, Canada. – Duluth, GA, USA                                   

 

Identify scope and analyze the criticality of introducing integrated product to Service Oriented Architecture (SOA) industry space. Establish research and development (R & D) facility to architect and categorize innovative product artifacts. Derive agile project management methodology, metrics, and roadmap to develop as well as timely deliver new product. Participate in risk management process to introduce novel product to target market. Deliver technical product overview presentation to investors as part of Request for Proposal (RFP) and negotiation phase. Develop research publications, recommendations and analysis for potential customers, and prospects on product architecture, performance, and scalability.

 

Platform: Intel’s ARM920T, TMS 320C64xx DSP, Ethernet, MANET (Mobile Ad-hoc Network), OLSR, Windows XP, Montavista Linux Suite, UML, Visio, Microsoft Project Plan, BEA Weblogic, NetBeans, CVS, IAR Workbench, CodeComposer 3.1, J2EE, C, C++, PHP, MySQL, Apache.

 

Consultant – Enterprise Software Architect/ Project Management (08/05 – 06/06)

Ian Martin Pvt. Ltd., Brampton, ON. Nortel Networks.                                

 

Requirements management to architect Provider Backbone Transport (PBT) to the enterprise service provisioning product infrastructure. Integrate service SOA based real-time content management to provide collaboration capabilities across enterprise product development team. Validation rule software architecture framework and  artifacts to the service provisioning configuration platform. Algorithm specification to Point-to-Multipoint (P2M) and Any-to-Any (A2A) service provisioning from the topology view of enterprise. Project plan and enterprise architecture strategy to develop auto-discovery interfaces for various Service Units (SUs) pertaining to enterprise network infrastructure. Road-map and risk recognition to automated test tool capabilities for the control devices allocated to the enterprise network elements at remote customer locations.

 

Platform: Passport 86xx MES, 802.1ah, Ethernet, SNMPv3/ MIB, VxWorks, Windows 2000, Visual Paradigm UML, OpenWorkbench, CVS, JBuilder, Objectstore database, J2EE, C/C++, Perl, PHP, MySQL, Apache.

 

Lead Software Architect (M4) – Project Manager (12/03 – 07/05)

Global Symphony Software, Bangalore, India/ Palo Alto, CA, USA.Information Resources, Inc.

 

Research and development to establish model driven architecture (MDA) based real-time enterprise information integration (EI) initiating “Advanced Technologies Group”. Identify process transformation characteristics during REI product development. Stable and coherent enterprise software architecture framework pertaining to data mining product intended for CPGN retail industry during point-of-sale (POS). Software product development strategy specification and classification to accomplish apposite project plan supporting CRM. Distinguish requirements and implementation to enhance scalability, performance, and reliability capabilities of data engine.

 

Platform: Intel’s Itanium, HP_UX, GNU, Requisite-Pro, Clearcase, POSIX Multithreading, C/C++, XML / PMML, BEA Weblogic/ J2EE, PHP, GME, Embedded SQL, MS-Project Plan, Savvion Process Modeler/ Business Manager.

 

Project Leader (02/03 – 12/03)

Samsung ISO, Bangalore, IND. Galaxy – Enterprise Ethernet Switch/Router.

 

Lead data-plane components architecture team of enterprise ethernet switch/router product infrastructure. Design, develop, and review layer 2 and 3 features. Identify software development life cycle (SDLC) methodologies/strategies for improved performance and further guideline to team members. Incorporate CMM level 4 and 5 in system software group. Metrics collection along with risk tracking. Customer relationship management (CRM) and plan microcode development activities.

 

Platform: IXP1200/IXP2400, MPC8240, Gigabit Ethernet, TCP/IP, MPLS, Linux, Windows NT, Visual Source Safe, Clearcase, Teja, MS Project 2000, PowerPoint, C/C++.

 

Lead Software Architect – System Analyst (09/01 – 01/03)

ICSS Inc. , Gahhanna, OH. Intel Architecture Lab.

 

Model driven architecture (MDA) of platform independent back-plane communication software between host board (Pentium) and StrongARM processor (IXP1200). Research to identify strategies of multi-processor communication through fast ethernet and PCI Bridge providing enterprise level agility as well as integrity to various categories of customers.

 

Platform: IXP1200, i21555 PCI Bridge, i82557 Fast Ethernet, Pentium III, Linux, VxWorks, Windows 2000, Tornado, CVS, C/C++, J2EE - EJB.

 

Sr. Software Engineer – Consultant (08/99 – 08/01)

 

·         Tachion Networks. West Long Branch, NJ (02/01 – 08/01). Central Office Switch.

Architect interfaces to signaling layer protocols of MPC8260 segmentation and reassembly (SAR) driver. Incorporate ATM-label switch routing (LSR) and MPLS standards. Include OSPF libraries to augment routing services and multicasting features. Derive clustering mechanism by means of buffer management techniques.

Platform: MPC8260, Lucent APC, VxWorks, Windows NT, Solaris, Trillium Device Driver, Visual Studio, Tornado, Clearcase, C/C++, Java.

               

·         Dot4, Inc. Westford, MA (09/00 – 02/01). Virtual Telecommunication Switch.

Requirements gathering and customer communication to accomplish VT-switch product specification. Design event driven simulation model for Sycamore Network's SN8000/SN16000 in surveillance of OC48/OC192 facilities. Enhance study of ODSI optical network standards in accumulation to signaling protocols.

Platform: Linux, VxWorks, Perl, XML, SQL, Perforce, C/C++, Java.

 

·         S-Link Corp. Mt.Laurel, NJ (02/00 – 08/00). Media Gateway/PBX.

Define CMM level 2 and 3. Incorporate ATM soft switch product. Parse Trillium Q93B protocol stack. VoIP development within the scope of SS7 protocol. Digit analysis in MeGaCo infrastructure.

Platform: PBX, Gateway, Linux, pSOS, Windows NT, Visual C++, Clearcase, Visual Studio, H.248, Q93B, C/C++, Java.

               

·         AJILON - Lucent Technologies, Mt.Olive, NJ. (08/99 -01/00)
WCDMA Infrastructure - NTT DoCoMo.

Design synchronization scheme to start/restart process of radio network controller (RNC). Performance analysis of the buffer management technique by the surface of ATM traffic engineering (QoS). Software integration at the base station (BS). Incorporate Trillium Q.2931 moreover ATM adaptation layer (AAL 2 and 5) protocol stack.

Platform: ATM, VMIVME, MPC860, DSP, VxWorks, Solaris, Q2940, UML, C/C++, Sablime.   

 

Software Engineer (05/98 – 07/99)

Fujitsu Nexion, Acton, MA.  ATM Switch.

 

Develop switch fabric booter of OC12/DS3 boards. Design test plans for cell-flow within the ATM-cell switch infrastructure. Integrate diagnostic components and kernel considering multi-tasking/threading capabilities. Performance modeling and evaluation to identify enhanced marketing strategy.

 

Platform: AM29K Flash, VxWorks, CHORUS, Solaris, Tcl/Tk, C/C++, GNU, Clearcase, Frame Maker.

 

Assistant System Analyst (12/95 – 08/96)

Tata Consultancy Services, Bombay, India

 

·         Positive Train Separation (GE-Harris). Design and implement shared memory management module. Develop client/server model using rational rose. Software re-engineering.
Platform: VxWorks, QNX, Solaris, C/C++, Rational Rose (UML), POSIX threads.

 

·         AnilKumar Kamdar & Co., Bombay, India. Requirements gathering and analysis to develop brokerage system for supply-chain industry classifying transactions into domestic/international market. Product testing along with documentation in favor of final release to customer.

Platform: PowerBuilder 4.0, Visual Basic, SQL.

 

Teaching/Research Assistant

 

·         Worcester Polytechnic Institute, Worcester, MA (08/96 – 05/98)

 

Assist undergraduate students to improve programming proficiency and proposals to improve quality of engineering courses. Enhance study of ATM-Network and ATM-LAN Emulation. Identify strategies for changing priorities of events at run-time to increase predictability of any active and real-time database systems (ARTDBS). Evaluate effectiveness of algorithms developing simulation model by exploiting parameters recognized in OBJECTIVE-benchmark intended for REACH (Texas Instruments).

Platform: UNIX, C++, Visual Basic4.0, SQL.

 

·         S.A.M.E.E.R. Bombay, India. (06/94 – 05/95) Applied Microwave Research (Gov. of India)

 

Theoretical analysis of multilayer perceptrons (MLPs) offered by neural network, trained with various learning algorithms. Design and develop “time series prediction using neural network.” Experimental evaluation of diverse patterns pertaining to signal processing unit.

Platform: Solaris, C, Back propagation algorithm.

 

·         Conceicao Rodrigues College of Engineering, Bombay, India. (01/95– 04/95)

 

Lead a team to analyze practical problems during design and development phases of LAN in university environment. CSMA/CD simulation model to evaluate performance of potential LAN.

Platform: Windows3.1, Turbo C++, PC x386.

TECHNICAL EXPERTISE

 

Software	Programming Languages: C, C++, Java, J2EE – EJB, C#/ .Net, IXP Microcode. Query/Scripting: XML, PHP, Perl, SQL, JavaScript, HTML, Shell script. GUI: Powerbuilder4.0. Visual Basic4.0. Visual C++ 5.0, Visual Studio, JBuilder. Enterprise Architecture: Zachman, GERAM, PERA, TOGAF, and CIMOSA. Project Management: MS Project 2002, SmartWorks PE 2.0, OpenWorkbench 2.0.1, Savvion Business Manager, MS-Office, Visio, Frame Maker.
Methodologies / Tools	UML, Visual Paradigm, BEA Weblogic, NetBeans 6.1, Apache, GME, Better State, Discovery, Requisite Pro, Clearquest, Clearcase, Sablime, Perforce, CVS, Visual Source Safe, Tornado, VxSIM, POSIX, Zebra, Teja NP Design, IAR Compiler, CodeComposer 3.1, IXP Microcode Workbench.
Databases	MS SQL Server, MySQL, DBASEIII+, FoxPro, ORACLE8.0, ObjectStore.
Operating Systems	UNIX, Solaris, HP-UX, Windows95, Windows NT, VxWorks, Chorus, Linux.
Network Protocols	TCP/IP, IPv6, ATM, SS7, Ethernet, SPI4, VLAN 802.1q, 802.1ah, TFTP, IGMP-Snooping, MPLS, OSPF Routing, DiffServ, SNMP/MIBs, Wideband-CDMA, 802.11g WLAN, MANET, OLSR. H.323, MeGaCo (H.248), RTCP XR, Q2940, Q2931, VoCoders. SONET/SDH, Optical Domain Service Interconnect (ODSI).
Hardware	IXP1200, IXP2400/IXP2800, ARM920T, MPC8260/MPC860, MPC8240, Passport 86xx MES, OC12/OC3/DS3 boards, AM29K flash memory, PMC Sierra QJET, Lucent ATM Port Controller, Lucent ALM/ABM/ASX chip set, UTOPIA level III devices, i21555 PCI Bridge, VMEVMI reflective memory, TI 320C64xx DSP, ADSP-BF537, Xilinx Virtex FPGAs, ASICs.

 

AFFILIATIONS & INTEREST

 

Affiliations	·         ISO volunteer at WPI - Cultural events and activities (1996-1999). ·         CESA membership at CRCE - Engineering research & development (1993-1995). ·         Petrol leader - Scouting and NCC at Bombay board (1988-1989).
Interest	Reading, Writing, Travel, Music, Cricket, Volleyball.