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Kalyanasundaram Krishnamani








Ph.D Candidate in Computer Science

Research Interests:

  • Formal Methods - Specification and Verification
  • Logic & Theorem Proving, SAT Solvers, SMT Solvers
  • Abstract Interpretation
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    Other Interests:

  • Current Affairs
  • Journalism & Debate
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    Curriculum Vitae [in HTML] [in PDF]

    Publications:

    Conferences:

  • Formal Verification of Pipelined Processors with Precise Exceptions,
    K. Kalyanasundaram and R. K. Shyamasundar, In ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE), San Diego, May 2004

    Journals:

    Book Chapters:

  • Verification of Clock Synchornization in TTP,
    K. Kalyanasundaram and R. K. Shyamasundar, In Formal Models, Languages and Applications, World Scientific - Series in Machine Perception & Artificial Intelligence (ISBN 981-256-889-1), Vol. 66, 2006.

    Contact:

    A-212, School of Technology and Computer Science
    Tata Institute of Fundamental Research
    Dr Homi Bhabha Road, Navy Nagar
    Colaba, Mumbai 400 005
    India
    email: kalyan[AT]tifr[DOT]res[DOT]in     		Automated Reasoning Systems (SRA) Division
    ITC-IRST, Via Sommarive 18
    Povo, Trento 38050
    Italy
    Hosted by www.Geocities.ws

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