Vikas S.
Shah
3000 Valley Forge Circle, Apt# 1244,
King of Prussia, PA 19406, USA.
Phone: 1-678-457-4823. EMail: [email protected]
URL: http://www.geocities.com/shah_vikas_s/Resume.html
OBJECTIVE
Seeking a challenging position that gives an opportunity to utilize and
improve technical and business skills in Information Technology and
Telecommunication market by contributing an extensive experiences of System
Analysis, Software Architecture and Network Protocol Development in a team.
EDUCATION
WORCESTER POLYTECHNIC
INSTITUTE, Worcester, MA Master of Science, Computer Science,
August 1998. |
UNIVERSITY OF BOMBAY, Bombay,
India. Bachelor Of Engineering in Computer Engineering, June
1995. |
CAREER PROGRESSION
Global Symphony Software Pvt. Ltd., Bangalore, IND
Lead Software Architect / Manager , 12/03 - Present.
- R & D to establish model driven architecture (MDA) based real-time enterprise information integration (EI). Research publication in various international conferences – IRMA, ICEIS, OASIS IFIP 8.2 WG, and IAMOT 2005.
- Identify process transformation characteristics during REI product development utilizing Savvion’s ProcessModeler.
- Stable and coherent enterprise software architecture framework pertaining to data mining product intended for CPGN retail industry during point-of-sale (POS). POSIX multi-threading model and XML based query specification.
- Software product development strategy specification and classification to accomplish apposite project plan in MS-Project 2002 supporting CRM.
- Distinguish requirements and implementation to enhance scalability, performance, and reliability (SPR) capabilities of transformation engine under C++ and HP-UX cross development platform.
Samsung ISO, Bangalore, IND
Project Leader , 02/03 - 12/03.
- Architect Table Manager within StrongARM core for consistent and stable communication between data plane and control plane components of Gigabit IP Router in C and Blucat Linux cross development platform.
- Design and implement MPLS-DiffServ and MPLS-Martini components in distributed layered architecture based Network Processor’s feature application between IXP1240 and IXP1200 NPs.
- Architect Multi-field packet classification (MFC) Trie based algorithm part of IXP1200 C3 Network Processor’s forwarding microengine.
- Integrate Microcode dedicate to VLAN feature with Layer 2 application running on IXP1240.
- Simulate WLAN Ethernet Router components with CSMA-CA mechanism identifying QoS parameters and effectiveness of DCF/ PCF with respective to the existing Gigabit IP router utilizing OmNet++.
Intel Corporation, Hillsboro, OR
Lead Software Architect (Contractor: ICSS), 09/01 - 01/03.
- Architect platform independent back-plane communication between Pentium and IXP1200 boards.
- Research to identify strategies of multi-processor communication through Ethernet and PCI bus, Linux and VxWorks cross development platform.
Tachion Networks,West Long Branch, NJ
Software Professional. (02/01 - 08/01)
- Architect interfaces to MPC8260 Segmentation And Re-assembly (SAR)
And Reassembly driver for the upper layer signaling protocols.
- Incorporate RFC3035 / RFC3036 for ATM-Label Switch Routing (LSR)
Multiprotocol Label Switching (MPLS).
- Included the Open Shortest Path First (OSPF) libraries to enhance
the routing services and multicasting.
- Derived a clustering mechanism and buffer management techniques
for the real-time performance modeling.
Dot4,Inc. Westford, MA
Real-Time
Specialist (Sr. Consultant: Sycamore Networks)
Sep'2000-Feb'2001
- Customer specifications and requirements gathering to accomplish
the product specifications of Virtual Telecommunication Switch
(VTswitch).
- Deriving a virtual environment for Sycamore Network's SN8000 and
SN16000 products that includes OC48 and OC192.
- Creating an event base simulation and developing performance
model of MPLS protocol and Intelligent OSPF routing.
- Enhance study of Optical Domain Service Interconnect (ODSI) to
identify simulation parameters.
S-Link
Corp.,Mt. Laurel, NJ
Executive System Analyst (Software
Architect) Feb'2000-Aug'2000
- Defining a Capability Maturity Model (CMM) and enhancing the
business model for the organization.
- Incorporate the Soft switch ATM in the next generation PBX
architecture that includes parsing of Trillium Q93B protocol
stack.
- Voice over Internet Protocol (VoIP) development within the
scope and range of the SS7-Protocol.
- Media Gateway Control (MeGaCo H.248) architecture, design and
implementation.
Lucent Technologies., Mount Olive, NJ
Associate System Analyst (Consultant:
AJILON), Aug'1999-Feb'2000
- Designing and developing synchronization scheme to start and restart
process of Radio Network Controller (RNC) in Wideband Code Division
Multiple Access (WCDMA-NTTDoCoMo) wireless standard.
- Identification of Buffer management technique for an ATM Adaptation
layer protocol and Traffic management (QoS).
- Providing driver for Trillium ATM Adaptation layer protocol stack.
Fujitsu Nexion., Acton, MA
Software Engineer,
May'1998-Jun'1999
- Developing a switch fabric booter of OC12 and DS3 boards that
interacts with diagnostics and provides a synchronization scheme
for an ATM-Switch.
- Adhere to proper software development methodology including writing
functional specifications, design documents, and unit test plans.
Interfacing with marketing, engineering and other related departments.
Worcester Polytechnic Institute, Worcester, MA
Teaching Assistant, Aug'1996-May'1998
- Worked with undergraduate students individually to improve their
programming skill and helped professors to improve the quality of
courses.
- Enhance study of ATM-Network and ATM-LAN Emulation.
- Propose strategies for changing priorities of events at run-time to
increase predictability of an Active and Real-Time Database Systems
(ARTDBSs).
- Experimental studies are reported that evaluate the effectiveness of
proposed algorithm by using a simulation model of an ARTDBS and the
parameters identified by OBJECTIVE-benchmark for REACH.
Tata
Consultancy Services, Bombay, India.
Assistant System
Analyst, Dec'1995-Aug'1996
Project : Positive Train Separation for GE-Harris.
- Designing and implementation of shared memory management of system
infrastructure.
- Development of client-server model using rational rose for real-time
application of the system.
- Software Re-engineering using Object oriented methodologies.
AnilKumar Kamdar & Co., Bombay,
India.
Team Leader, Apr'1996-Jul'1996
Project : Insight
Brokerage System.
- Design and develop a brokerage system of import and export to ship
goods in local and international market.
- Product testing and documentation for final release to the client.
S.A.M.E.E.R (Govt. Research Center Of India),
Bombay, India.
Trainee Engineer, Jun'1994-May'1995.
- Theoretical analysis of different strategies in Neural Network using
different learning algorithms.
- Design and developed "Time Series Prediction Using Neural Network".
Experimental evaluation of the patterns for signal processing.
Conceicao Rodrigues College Of Engineering,
Bombay, India.
Undergraduate Student, Jan'1995-Apr'1995
- Analysis and design of practical problems for developing LAN in
university environment.
- Simulation of CSMA/CD using Turbo C to evaluate performance.
SKILLS
- Programming Languages: C, C++, Java, J2EE – EJB, IXP Microcode
- Query/Scripting: XML, SQL, JavaScript, HTML, LaTeX, Unix Shell Script.
- GUI: Powerbuilder4.0. Visual Basic4.0. Visual C++ 5.0, Visual Studio.
- Project Management & Documentation: MS Project 2002, SmartWorks PE 2.0, Savvion Business Manager, MS-Office, Visio, Frame Maker.
- Methodologies / Tools: Rational Rose3.0 UML, Better State, Discovery, Requisite Pro, Clearquest, Clearcase, Sablime, Perforce, CVS, Visual Source Safe, Tornado, VxSIM, POSIX, ZebOS, Teja NP Design, IXP Microcode Workbench.
- Databases: SQL Server, DBASEIII+, FoxPro, ORACLE8.0.
- Operating System: UNIX, Solaris, HP-UX, Windows95, Windows NT, VxWorks, Chorus, Linux.
- Network & Communication Protocols: TCP/IP, IPv6, ATM, SS7, Ethernet, SPI4, VLAN 802.1Q, IGMP-Snooping, MPLS, OSPF Routing, DiffServ, SNMP/MIBs, Wideband-CDMA, 802.11g WLAN. H.323, MeGaCo (H.248), Q2940, Q2931, VoCoders. SONET/SDH, Optical Domain Service Interconnect (ODSI).
- Hardware: IXP1200, IXP2400/IXP2800, MPC8260/MPC860, MPC8240, OC12/OC3/DS3 boards, AM29K flash memory, PMC Sierra QJET, Lucent ATM Port Controller, Lucent ALM/ABM/ASX chip set, UTOPIA level III devices, i21555 PCI Bridge, VMEVMI reflective memory. FPGAs, ASICs, DSP.
PUBLICATIONS
- Model Driven Architecture Based Real-Time Enterprise Information Integration (REI) - An approach and impact on businesses, ICEIS 2005, May 2005
- Essential Characteristics of Process Transformation in REI, IRMA2005, Apr 2005
- Real-Time Enterprises Development Features with Anticipation of Information Change: Preliminary Findings, IFIP 8.2 OASIS 2004, Dec 2004
- Dynamic Behavior of Micro-architecture Based Network Processor’s Data Plane Feature Components, International Conference on Information Networking, ICOIN 2004, Feb 2004
- Layered Architecture Based Embedded System Software Development of Network Processor’s Feature Applications, WISICT 2004, Jan 2004
ADITTIONAL COURSES AND
TRAINING
KPMG: Capability Maturity Model Level 5. WindRiver System : VxWorks,
Tornado, BSP packages Rational : Rose Model &
Unified Modeling Language Sycamore Network : SN6000, SN8000,
SN16000, Dense Wave Division Multiplexing-OC48,OC192 |
OTHER ACTIVITIES
- Volunteer at Indian Student Organization in WPI for cultural events and
activities (1996-1999)
- Active member of CESA in Conceicao Rodrigues College of Engineering
(1993-1995)
- Petrol leader for Scouting and NCC in Bombay Board (1988-1989)
INTEREST
- Travel, Music, Reading, Writing, Cricket, Volleyball.