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  • Retargetable compilers

    The CGEN (Cpu tools GENerator) project. CGEN aims to provide a framework and toolkit for writing cpu tools. It has been used for various assembler/simulator ports as for the openRISC family of processors.

    The GCC compiler. Supports an enormous number of host/target configurations.

    The LCC compiler is a lightweight C compiler. It comes with Alpha, SPARC, MIPS and x86 backends but I have also seen 68000, Mark-1, ARM7 (maybe not any more), and XR16 backends. 

    SUIF is a research-oriented retargetable compiler. Usually used as the frontend. There exist two generations of SUIF compilers with SUIF1 being more complete and SUIF2 only being actively supported.

    Machine SUIF is an extensible infrastructure for constructing compiler backends along with their optimization and analysis passes. What I like the most is its modular approach, where you can experiment with different combinations and ordering of compiler passes. Comes with x86, Itanium, Alpha backends. It seems to me that SUIF2-style MIPS and SPARC backends are certainly missing (a MIPS backend was included in MachSUIF-1.3.0 as well as a SPARC for SUIF1, the latter by some research group I think). Current version is machsuif-2.02.07.15. Requires a working suif-2.2.0.4 installation.

    Valen-C compiler is a compiler for a variable-length C superset. It seems very easily retargetable but unfortunately I haven't compiled this yet in any of my Linux boxes (Mandrake 7.1, 8.0 with gcc-2.95.2, gcc-2.96, egcs-1.1.2). I suppose it may compile under Solaris and an older gcc. Requires a suif-1.1.2 installation.

    PROMIS is an extensible parallelizing compiler architecture for hierarchical systems. It targets VLIW, superscalar and multithreaded platforms. It has a nice and intuitive GUI which however carries a lot of alpha-bugs. It is a promising work.

    MLRISC is a framework for retargetable and optimizing compiler backends written in Standard-ML. It has a significant number of backends.

    The Trimaran compiler research infrastructure for instruction level parallelism includes the IMPACT compiler. It also includes a simulator for the HPL-PD (PlayDoh) research architecture that follows the EPIC (Explicitly Parallel Instruction Computing) paradigm. It seems a very complete and mature work.

    The MIRV SimpleScalar/PISA compiler target the Portable ISA architecture which is based on MIPS R2000 and is used in the SimpleScalar suite of simulators.

 

  • Free  processor cores

 

  • Development tools and libraries

    OpenEXR

    The ILM OpenEXR file format was developed at Industrial Light & Magic. Provides 16-bit floating-point arithmetic, which seems very promising for SIMD implementations in existing and future 64-bit desktop processors. Not to mention that various GPUs (Graphics Processing Units) already support OpenEXR. I think that the IEEE should consider standardizing the HALF (16-bit) format as defined in OpenEXR (1 sign bit, 5 exponent bits, 10 mantissa bits).

    Sim-nML

    Sim-nML is an architecture description language, derivative of nML. A collection of tools (assembler, disassembler, functional simulator, cycle-accurate simulators, LCC and GCC backend generators etc) have been developed between 1999-2001 at IITK. All these tools have been developed as part of students Master's theses. Most of them are usable but not very stable. A new effort on using Sim-nML takes place at microlib.org where GLISS, an instruction set simulator library generator has been developed. It works for version 2.0 of the intermediate representation tools (irg) used in IITK.

    VCG

    VCG is a powerful tool for visualizing arbitrary graphs. There exist both UNIX-friendly and Windows (binaries for this port) versions. Certain installation procedures are available for the UNIX version of VCG called xvcg. If the installation is performed through the config step there are a few points to denote.

    1. For a bash shell export the valid names for your yacc/bison and lex/flex clone on your system, similar to the following:

    > export BISONNAME = bison

    > export FLEXNAME = flex

    2. When prompt by the config script, define includes and library paths for both GCC and X11.
    includes are: -I/usr/include -I/usr/X11R6/include
    library paths are: -L/usr/lib/i586-mandrake-linux/2.96/ -L/usr/X11R6/lib/

    Not to mention that you can get this working, with the awful "broken" GCC 2.96!

    GOLD Parser Builder

    GOLD Parser Builder is a great tool for manipulating grammars written in (a close derivative of) BNF notation. It has useful export options of the parse trees (plain text, HTML), comprehensible error messages and in overall it gives the impression of a production-level tool. Not to mention that it is freeware, while source code is expected to be released in the not too distant future.

    I have written 3-4 grammars in GOLD during the first days of my experience with this tool. Mainly grammars that I have either written in the past (e.g. in LEX/YACC) or have encountered during my research. Here follows a dynamically expanding (in virtual machine notation!!!) list of the grammars that I would like to share:

    1. Oberon-00: oberon00gold.zip. A grammar for the Oberon-00 language, which could serve as (educational) paradigm for unified hardware/software compilation. Also available at the GOLD Parser Builder website.

     
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