Resume: Nitin Raj Gupta

Academic Performance

· CPI (Cumulative Performance Index): 9.1/10 (IIT Kanpur)

· Senior secondary School (Class 12^th) in 1999, Secured 95% marks.

· Higher Secondary School (Class 10^th) in 1997, Secured 90% marks

Cources Done

· Analog/Digital VLSI Design (EE610)

· Electronic Circuits and Instrumentation (EE311)

· Semiconductor Devices (EE210)

· Intelligent Instrumentation (EE680)

· Sensors Transducers: Principles and Applications (EE455)*

· Digital Electronics and Microprocessor Technology (EE370)

· Digital Signal Processing (EE301)

· Application of CDMA in Cellular Systems (EE620)

· Communication Systems (EE421)

· Principles of Communication (EE320)

· Signals Networks and Systems (EE200)

· Control System Analysis (EE250)

· Power Systems (EE330)

· Power Electronics (EE360)

· Electrical Engineering Lab 1 and 2 (EE380 and EE381)

· Introduction to Electrical Engineering (ESO210)

· Introduction to Electronic circuits and Instrumentation (ESC 202)

· Fundamentals of Computing (ESC101)

· Project I (EE491)

· Project II (EE492)

*- Done in Audit

Projects undertaken at University

1. B.Tech. Project: Did my B.Tech. Project under the supervision of Dr. A.K.Ghosh (HOD, EE) on “Interfacing of an Optical Liquid Level Sensor with a Digital Display”.

It was a hardware design project, which provided knowledge and skills in hardware design, digital electronics, microcontrollers and interfaces. We learnt the assembly language for 8051 microcontroller family, precautions and practices for interfacing various digital ICs and analog components. It also provided immense hands-on experience with the analog/digital components. We also developed a PCB for the design. We started by aiming to develop an interface for a particular sensor (also developed in lab) and finished developing a universal module, which could be interfaced with any transducer to get a convenient to observe output.

2. VLSI Design: I accomplished the following under Dr. B. Mazhari (Prof. IIT Kanput):

(1) Design and Layout of a Differential Amplifier of given specifications.

(2) Design and Layout of an Operational Amplifier of given specifications.

We were responsible for simulations and testing of our designs, reporting of parameters and the final layout and extraction of the parasitics. We accomplished these tasks with the help of “Microcap”, “Magic” and “PSpice” tools used for Simulations, Layout and extraction respectively.

3. Microprocessor Technology: I am fully conversant with the 8085 Microprocessor

Assembly Language Programming and have, in person, accomplished the following in

the Institute Microprocessor labs on the 8085 workstation:

(1) Interfacing of external Memory and a bi-directional port to the 8085 workstation.

(2) Interfacing of an ADC to the 8085 workstation.

(3) Interfacing of a Serial Port (USART 8251) for Asynchronous Data Communication

using RS-232 standard.

I am fully familiar with the relevant Circuit implementations, interfacing circuitry,

decoding and the associated programming.

4. Instrumentation: I am fully conversant with the National instruments LabVIEW

Graphical programming environment for Virtual Instrumentation and Analog/Digital

Data Acquisition. I have used the NI Instrument Simulator in conjunction with the

LabVIEW Virtual Instruments for Data Communication via Serial (RS 232 Standard) and Parallel (GPIB Protocol) Ports through various experiments and labs under the guidance of Dr. Joseph John (Prof. IIT Kanpur) and Dr. Sanjay Gupta.

5. Summer Internship (2003) at Vienna University of Technology, Vienna: I was responsible for conducting and interpretation of scientific experiments on “The application of Ultra short pulse lasers in Dentistry.”

6. Summer Internship (2002) at Bharat Heavy Electrical Limited, Haridwar: I learnt about the planning, manufacturing and working of various generators and motors. I also learnt about the manufacturing of generator/motor coils.

7. Industrial tours: We visited several companies and workstations for industrial exposure. We visited CPRI (Central Power Research Institute), Bangalore; TCS, Bangalore and Larsen and Toubro Limited where we learnt about various aspects of power distribution and maintenance and the functioning of relays and circuit breakers. We also visited a Power station at IIT Kanpur.

Job Experience

1. Texas Instruments (India) Pvt. Ltd., Bangalore:

Period: 12^th July 2004 to 28^th October 2005

Job Description: I worked as a Design Engineer. I was involved in the

DFT implementation and learning for TI DSPs.

Key Responsibilities: My key responsibilities included Scan and Memory

BIST Implementation, Test controller unit verification

and APTG pattern generation and validation.

Projects and Work: 1. Trinity: July’2004 to March’2005

Performed ATPG pattern generation (using pattern

compression – DBIST, synopsys), validation and

handoff to tester team. Post Silicon Debug and failure

analysis was also done by me.

2. Julie: March’2005 to October’2005

Memory BIST/Memory repair Implementation, Scan

wrappers Implementation, Test Controller verification

and TDL porting for Hard Blocks.

2. Freescale Semiconductors (India) Pvt. Ltd., Noida:

Period: 7^th November 2005 till 22^nd November 2006.

Job Description: I worked as a Design Engineer/DFT Lead.

Key Responsibilities: My key responsibilities include overall DFT

Implementation supervision, JTAG Implementation

and path delay pattern generation.

Projects and Work: I am handling overall DFT Implementation on “Kirin0”

as the DFT lead and simultaneous owning the JTAG

implementation/ verification for the project. I have

additional responsibilities of functional pattern

conversion to tester format (wgl) and path delay

pattern generation as well.

3. AMD India Engineering Centre Pvt. Ltd., Bangalore:

Period: 24^th November 2006 till date.

Job Description: I am working as a DFT Engineer.

Key Responsibilities: My key responsibilities include DFT

Implementation (Including compression and LBIST)

on an ongoing dual-core processor project.

Skills’ Set

· Languages: C, Perl, VHDL, Verilog, e – Verification Language

· Industrial Tools: TetraMax (Synopsys), Fastscan (Mentor Graphics),

Power Theater, Modelsim (Mentor Graphics),

VCS (Synopsys) , Specman (Verisity),

Spyglass (Atrenta).

· Operating Systems: Windows, UNIX, Solaris

· Softwares: MS Office, LabVIEW

Scholastic Achievements

· Appeared in inter-branch merit list in the ISC examination.

· Good academic performance throughout school life.

· Selected as the “CMS star” for the year 1999.

· Selected fro the Final Phase interview of NTSE.

· Got Branch change From Chemical Engineering to Electrical Engineering due to good academic performance.

Extra-curricular Activities

· Won prizes at district level for instrumental music (Synthesizer).

· Active participation in Institute Festivals ‘Antaragni’ and ‘Techkriti’. Held post of Core team member, Coordinator and Secretary in various cells in these Festivals from 2000 - 2004.

· Held the post of Reading room secretary of my Hall.

· Nominated as the maintenance representative of the Hall for a term.

· Student Guide (Counselling Service of IIT Kanpur) for the year 2002-2003.

· Won various prizes in Fine Arts (Antaragni and Surabhi).

· NCC Cadet in 2 UP CTR IIT Kanpur from 2000-2001.

References -