MANOUCHEHR RAFIE, Ph. D.
[email protected], (408) 205-9400 (c)
SUMMARY Extensive hands-on design, analysis and
technology development of (complex-content) communications products from
concept to implementation. Creation and technical management of a high-energy organization in
the areas of (wireless) communications systems / product development. Leadership, creativity,
depth and ability to drive and proactively participate in these efforts from
both technical and executive perspectives. Over 20 years of professional innovative
technology experience in modem design (PHY/MAC/RF), engineering management,
technical marketing strategies, architecture definition, including 15 years of
advanced hands-on system/architecture engineering and design, and above
all, quality execution and operational excellence.
Holding 8 patent
disclosures (5 granted) in advanced communications signal processing with
over 60 publications. Major positions held included: Technical
Director of dual-mode CDMA/GPRS/GSM chipset at National, CTO
at CALY Networks (meshed-fixed-wireless networks), Group Director and Fellow
track positions at Cadence Design Services where he founded
Wireless Design Services, and adjunct professor at
TECHNICAL
EXPERTISE
(Fixed/Mobile Wireless) Communications (DOCSIS/WCDMA/TDMA/OFDM/UWB),
Advanced Adaptive Signal Processing (DSP) in Digital Receivers, SDR, Radar
systems, RF systems, MIMO / STC systems, MAC, and Network
Infrastructure (WPAN/LAN/MAN/WAN).
IEEE802/16d/e
WMAN, 802.11a/b/g/n WLAN, GSM/GPRS/EDGE, 3GPP (UMTS), and MMDS/UNII
bands.
EDUCATION
Ph.D.,
June 1988 (Prof. K. Sam Shanmugan)
Expertise: Digital Satellite/Mobile Communications,
Advanced Signal Processing in Digital Receivers, Bandwidth Efficient Modulation
Schemes, and Simulation Techniques in Communication Systems.
Thesis: "Performance Analysis of Nonlinear
Digital Satellite Links."
M.S.,
December, 1983. (Prof. K. Sam Shanmugan)
Emphasis: FEC, Statistical Communication, Computer
Networks, Spread-Spectrum, Optical Communications, DSP, Neural Networks in
Communications, and Signal Processing in Radar Systems.
Project: "Analysis and Simulation of Block
Convolutional Coding and Viterbi Decoding."
Other
Education
7/03-Present CTO / VP
Engineering: Avide Wireless, ViFi -
Video Fidelity Networks
•
Full-chip
definition and verification / validation of high-quality wireless audio
product. End-to-end system integration
(MAC/PHY) using FPGA (Xilinx II Pro) devices.
•
MAC design and
specification in the areas of synchronization, power control, and interference
mitigations including adaptive frequency assignment.
•
As the CTO and VP
of engineering, led the advanced multi-media activities of Avide
Wireless for simultaneously streaming four high-quality videos utilizing IEEE802.11a/g
and TCMA (TDMA/CSMA) MAC technologies.
The MAC HW was based on a configurable core with a costumed
instruction-set geared for low-latency, high-throughput, and-low
PER demands of isochronous systems.
•
Consultant on 802.16d/e
(fixed/mobile, MIMO – full system analysis of OFDMA including detailed
architecture and algorithm), Ultra-Wideband (UWB) (Communications, DSP,
RF, MAC) design, analysis, and implementation for CMOS SoC technologies. A
hybrid UWB/IEEE802.11a solution for audio/video-quality systems.
•
System analysis
and design of UWB technology employed for WPAN/WLAN/WMAN infrastructure
(using mesh network). End-to-end simulation performance analysis.
•
QoS for Ultra-wideband
MAC protocol – TDMA/CSMA/CD
7/02-7/03 Technical Director, 3G
Program: National Semiconductor Corp.
•
Directed and led the design and implementation of an ultra
low-power multi- band/mode/standard (Highly Integrated Dual-Mode GPRS/WCDMA)
3G chipset (baseband, radio, and power management analog chips)
compliant to the 3GPP / UMTS Standards. SOC (0.13mm, 240
FBGA) included application software, dual DSP processors (Teaklite),
co-processors, ASIC, CSP, CPU (ARM 926EJ), integrated BT connectivity, along w/ various
internal/external interfaces.
•
Design and
implementation of innovative technologies, distributed micro-engine and
domain-specific DSP architecture (CSP – Communications Signal Processing),
for power, size and flexibility competitive advantages. Performed extensive architecture trade-off
analysis (BB and multi-standard RF – GSM/WCDMA)
•
Directed
multi-disciplined high-performance teams of 55+ people including System,
ASIC, Hardware, Software, Firmware, and Radio (ZIF) groups (multiple
sites) for the 3G handset product.
4/02-7/02 President & CTO: ULTERA Communications
•
Consultant on
Ultra-Wideband (UWB) Communications design, analysis, and implementation
for CMOS SoC technologies.
•
System analysis
and design of UWB technology employed for WPAN/WLAN/WMAN infrastructure
(using mesh network). End-to-end simulation performance analysis.
•
Detailed business
plan including P&L, product offerings, sale channels, market analysis, and
competitive advantages
3/00-4/02 CTO, Wireless
Communications: CALY Networks
•
Design and
implementation of the next-generation high-speed burst modem for a multi-point-to-multi-point
network architecture
•
Design and
analysis of mesh synchronization, power control, capacity and throughput
efficiency in a mesh network
•
Managing the
R&D / IP (intellectual property) activities. Building solid patent portfolio in the area
of Mesh Wireless Networking including Modem, MAC, routing and
scheduling, antenna and RF subsystems
•
Strategizing and
articulating on the market-technology directions of WBA
•
Identifying areas
of technology improvement and investment
•
Active
participation in relevant/critical standards/FCC committees
•
Promoting and
establishing integrated technical capabilities, core competencies and
credentials through conducting technical seminars, presentations, technical
(white) papers, etc. as applicable.
Sharp focus on customers, competitors, and technical press – an external
perspective.
1/99-3/00 Director, High-Speed Modem: CALY Networks
•
Led, directed and
managed modem team from concept to implementation - Member of the founding
team of CALY Networks.
•
Designed and
implemented an adaptive, robust, spectrally-efficient, high-speed-burst
modem sampling at 200 MHz - 2.5M gate (BGA-420P) modem with advanced
signal processing techniques implemented in both transmitter and receiver
optimized for short-burst MPMP (multi-point-to-multi-point)
operation. Design included adaptive M-QAM
schemes, pre-distorter, pre-equalizer, single A/D/A, synchronizations (time,
phase, carrier), multi-stage equalizer, digital/analog AGC, ATPC, RF
calibration, adaptive FEC, and number of link-quality monitoring
functions. Internal PLL in hard macro
PHY to control clock tree. Complete test and verification.
•
Managed and led
external RFIC (SiGe/GaAs) groups for mmwave (LMDS) applications. Design and analysis of filters, phase noise,
nonlinearity/distortion, IMPs, gain management, link budget, receiver
sensitivity/linearity, and interference analysis.
1/99-2/99 Fellow Track, Wireless Communications: Design
Services, Cadence, Inc.
•
Fellow track
position: R&D activities in the areas of wireless communications
•
Joined pre-IPO
CALY Networks
8/94-1/99 Group
Director, Wireless Communications: Design Services, Cadence,
Inc.
•
Founder and Group Director of Wireless Design Factory:
Directed the operation and delivery of over 35 key projects at the
•
Successfully
managed multi-disciplined high-performance teams of 55 people including System,
ASIC, Hardware, Software and R&D groups.
•
Created and led a
professional, world-class, highly competent and innovative Wireless Design
Services group at Alta (Cadence) from 1994 to 1997,
and with Design Services since January 1997.
•
Successfully
directed and actively participated in all aspects of (Wireless) Communications
Systems from business models through technical implementation details. Created
multi-faceted services through multi-disciplined teams (system/SW/HW – ASIC,
RFIC, PCB, micro-controller, micro-processor, DSP, and EDA tools/environment)
to deliver leading-edge technical projects, advanced courses/seminars,
and other IP-related capabilities including broadband modems, satellite comm
(Iridium/Globalstar), WLAN, Pagers, Digital Mobile Broadcasting (HDTV), GPS and
wireless/PCS standards: GSM (+/++), IS-95x, IS-136 (+/++), PCS and 3G
derivatives.
Significant Technological (Product) Achievements / Quality Project
Execution
•
Design, analysis,
implementation, and system integration/testing of a general-purpose OFDM
digital modem (MPT). The
design/implementation consisted of p/4-D/Q/D-QPSK,
16/64-QAM, (I)FFT (256/512/1024/4096/8192), FPDP Bus
protocol, Digital IF & IQ modulator, IF A/D, and analog filtering. The
modem was implemented using an Aptix MP4 (Explorer/Access) board, Altera
(Maxplus II) Flex 15 K100 FPGAs, VTI’s UltraDSP board (SHARC processors), two
fixed pin components for implementing FDPD interface, Analog Devices AD9721BN
DAC, etc.
•
Design, analysis
and implementation of Iridium ISU Baseband
Processor (IIBP) on 10 Gate-Field FPGAs using a custom board based on IRIDIUM
Air Interface (SPC-E0003.SYS). BPSK/QPSK 25ksps modem. Developed an AFC to
track 270 kHz Doppler with 5 Hz resolution. The board included an RF front-end
and ARM7 controller (Kyocera).
•
Design and
implementation of a fully digital receiver for cable modem. Designed a novel
timing and AFC recovery systems for QPSK – patent application in
progress.
•
Design and
analysis of a W-CDMA (5 MHz, forward/reverse links) for Korean Standard (SK
Telecom). This project was conducted way before the inception of 3G
standards.
•
Implementation
(Verilog) of a Reed-Salomon FEC for broadband applications for cable modem.
•
Design and
implementation of WLL including punctured Viterbi decoder, phase ambiguity
correction, digital IF, soft limiter, error detection, and PPCM/SCI/SPI
interfaces. The netlist was generated using Verilog.
•
Design and
implementation of indoor DS-CDMA Wireless LAN. System design included PN/Gold codes, an
elegant digital PLL, signal conditioning, acquisition, tracking, DRAM
controller, and matched filtering on two Xilinx chips. This board was demonstrated in number of
trade shows.
•
A 900-MHz digital
cordless phone design and verification using G.721/TDD compatible, direct
sequence/FH CDMA, TDD/FDD controller, RF front-end modeling, and protocol
analysis – floating-point and HDS (Motorola)
•
Design,
architectural definition, and fixed-point analysis of a Common-Phase Modulation
Demodulation (CPMD) including B/Q/OQ/(p/4D)-PSK, MSK, M-FSK, FM, and CDMA schemes. The netlist (Verilog) also
included IC tuner, acquisition and tracking circuit, and time/phase/frequency
estimators.
•
Performance
analysis and verification of iDEN TDMA handset QAM transceiver including
a novel joint estimation of timing recovery and frame sync (Motorola).
•
Performance
analysis and verification of W-CDMA ARIB (3G Standard) base station
transmitter (SONY).
•
Design and
analysis of W-CDMA NTT-DoCoMo (3G
standard) – Variable channel codes, tracking & acquisition, convolutional/concatenated FEC codec, RAKE, multipath (fast) searcher, soft handoff, power control,
multi-cell/multi-users, BER/FER estimators.
•
Design and
implementation of a power-line measurement ASIC. Responsible for the baseband
FPGA (Gate Field) / ASIC implementation, and test vector generation.
•
Wrist-Watch
Pager (Seiko): A dedicated
microprocessor providing four different functions – Viterbi decoding, Costas loop, symbol recovery and filtering. HDL synthesizable code generation, RTL
simulation, and post synthesis (gate-level netlist).
•
Analysis,
implementation (VHDL), and optimization of a hearing-aid device using both a design-flow methodology (SPW, HDS,
Visual Architect) and custom hand coding.
•
Design, analysis,
and architectural definition of a Wireless LAN OFDM-based system using Altera FPGAs. The design included
2-D TCM, FEC (Viterbi), equalizer, and timing/carrier recovery subsystems.
•
Complete design
and implementation of HDTV 8-VSB standard including 2D trellis coded, DF equalizer, concatenated coding (RS / Viterbi), descarmbler/deinterleaver, phase derotation/recovery
& AFC/STR on multiple Gate-Field FPGAs / boards (Fujitsu).
•
Design and
verification of IS95B compliant with TIA/EIA/SP-3693 and TIA/EIA-98-C
dual-mode W-CDMA cellular and PCS standard (SONY)
•
Design,
verification, and implementation of a W-CDMA ETSI/UMTS standard. Responsible for baseband
implementation and some portion of the protocol stack for 3G handset
applications (Samsung and LG)
8/88-8/94 Director, Wireless Communications, Comdisco/Alta/Cadence Systems, Inc.,
•
Director of
Wireless Communications Group: Created and led a solid/competent Wireless
Group. Responsible for all technical, managerial and marketing strategy aspects
of this business unit. Developed a
thorough Business Plan covering short/long-term objectives, marketing
and sales strategies, TAM/SAM/SOM, competitive analysis, roadmap,
product/services plans, and SOWT. My
leadership, vision, and technical credibility had a major impact on revenue generation
and a significant contribution to Wireless awareness across Cadence.
•
Responsible for
creation/development of complete (Wireless) Communications Systems
libraries for Signal Processing Worksystem (SPW)
and library enhancement/support and consultant for the Block Oriented Systems
Simulator (BOSS) on APOLLO, VAX, DEC, and SUN series workstations. Fluent in Matlab,
Mathcad and C/C++ programming.
•
Position involved
research and development in the areas of Digital Signal Processing (DSP),
(wireless) Communications and Radar systems.
•
Responsible as a
senior communications consultant and lecturer in conducting technical seminars
in the areas of communications and DSP for industries including: TRW, Boeing, Aerospace Corp., Motorola,
Harris, Hughes, Lockheed, Nokia, Lucent, Samsung, ETRI, Sharp, Fujitsu, Sony,
NEC, AT&T, etc. Position involved
management, development/modeling, design and analysis of advanced communication
systems: computer-aided analysis and
design (CAD tools).
7/00-9/00 Visiting Professor,
Graduate-level
course: Advance Adaptive Wireless Communications
•
Adaptive signal
processing techniques in digital receivers – Substitute lecturer
94 – 95 Visiting / Adjunct Professor,
•
Senior-level
course: Digital Communication Systems
•
Graduate-level
course: Digital Signal Processing
8/92-3/01 Visiting / Adjunct
Professor, UC Berkeley
–
·
Graduate level
course: Digital Communication Systems: Satellite /
·
Graduate-level
course: Wireless/Mobile Communications
·
Senior-level
course: Digital Signal
Processing (DSP)
88 – Present Technical Instructor,
Advanced Courses conducted in Digital Communications
·
Technical short
courses on DSP/Wireless Communications/Radar in
·
Motorola Paging
and Land
·
AT&T: Mobile/Wireless
Communication Design - GSM
·
Samsung: GSM
with emphasis on the equalizer
·
Hughes: Wireless
Communications
·
Sharp: Digital
·
TRW:
Simulation Techniques in Wireless Communications
·
Sony Tech: GSM/CDMA
(IS-95)/OFDM & PCS
·
Fujitsu:
Multiple Access Techniques in Wireless Communications
·
GTE: Wireless
Communications – a five-week course
·
KMT: CDMA /
TDMA, Comparative Analysis
·
ANAM: Wireless
Communications–IS136 Design & Analysis (two-week course)
•
Wright-Patterson
Air Force: Advanced Radar Signal Processing
·
TI: A V.32
Modem Design and Analysis
·
ETRI: Digital
·
Boeing: Advanced
Techniques for Digital Communications using BOSS
Technical
Lecturer / Chairman and Editor:
•
Chairing number
of sessions on DSP and Wireless Communications in various conferences including
ICC, JSAT, DSPx, etc.
•
Acting as an
active member of technical committees in ICC and JSAT
•
Edited papers in
the areas of Satellite / Wireless Communications for IEEE Journal on Selected
Areas in Communications (JSAT)/ICC, and international journals.
1/83-8/88 Graduate Research
Assistant,
Center for Research, Inc.,
•
Telecommunications
and Information Sciences Laboratory (TISL)
•
Extensively
involved in modeling, design, and performance analysis of M-QAM and M-CPSK
signaling schemes over bandlimited nonlinear
satellite communication links.
Performance analysis and modeling/simulation (C, BOSS, FORTRAN, SYSTID)
of various aspects of communication systems including: convolutional
encoding/Viterbi decoding, carrier and symbol synchronization systems,
analog/digital phase-locked loops, channel nonlinearities, modified Monte-Carlo
methods, linear/nonlinear equalization techniques, laser modeling, mobile
communications, fading channels, various reduction techniques, coaxial cable
modeling for Ethernet, throughput analysis of packet broadcasting networks.
8/87-8/88 Graduate Research
Assistant, Electrical
& Computer Engin. Dept.,
·
Co-author of a
complete solution manual for "Random Signals (Detection, Estimation and
Filtering)" book by K. Sam Shanmugan and A.M. Breipol.
HONORS Recipient of International Communication Association
Scholarships (1985-1987).
Member, Tau
Beta Pi Engineering Honor Society.
Member, IEEE Communications, Information Theory, IEEE Spectrum, Signal
Processing, Vehicular Communications, Personal Communications, and Solid State
Societies.
MANOUCHEHR RAFIE, Ph. D.
[email protected], (408) 205-9400 (c)
Patents:
Lecture Notes:
Dissertation /
Thesis:
64.
M. S. Rafie,
Performance Analysis of Nonlinear Digital Satellite Links. Ph.D. Thesis, 1988
65. M. S. Rafie, Analysis and Simulation of Block Convolutional Coding and Viterbi Decoding, M.S. Project,
1983.
Book:
66. M. S. Rafie, coauthor Cicilia
Townsend, a complete solution manual book, “Random Signals (Detection, Estimation
and Filtering)" book by Sam
Shanmugan and A.M. Breipol.