| CS-205 DIGITAL CIRCUITS AND LOGIC DESIGN (B.Tech 3rd Semester, 5001) Time : 3 Hours Maximum Marks : 60 NOTE:- This paper consist of Three Sections. Section A is compulsory. Do any Four questions from Section B and any two questions from Section C Section-A Marks : 20 1 (a) Add the following numbers in 8-bit register using signed 2's complement notatoin: (a) 50 and -10 (b) 55 and -75. (b) Define maxterm and minterm. (c) Differentiate between combinational and sequential logic circuits. (d) List various CAD tools. (e) Compare the features of RAM and a ROM. (f) Give the truth table for J-K Flip flop. How is this better than S-R Flip flop? (g) Differentiate between a multiplexer and a demultiplexer. (h) List various A/D and D/A conversion techniques. (i) what is the significance and applications of tri-state logic? (j) What are the logic level ranges at input and input of TTL devices? Section-B Marks:5 Each 2. Minimise the following expressin: f(a,b,c,d)= SIGMA (0,4,5,7,8,9,13,15). 3. Realize a full adder circuit using 4:1 multiplexer. 4. Describe the internal architecture of programmable logic devices. 5. Discuss with an example any design problem related to FPGA. 6. Design a decade counter. Section-C Marks : 10 Each 7. Draw the circuit of a dual scope A to D convertor and explain its operation. 8. Describe the salient features of VSLN design. 9. Write short note on any three of the following : (a) Bus structure (b) Master-slave flip flop. (c) Coustom and semi coustom design. (d) Line termination. (e) Ascii code. |
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