DC-DC Converter

What Is a Switching Regulator?

A switching regulator is a circuit that uses an inductor, a transformer, or a capacitor as an energy-storage element to transfer energy from input to output in discrete packets. Feedback circuitry regulates the energy transfer to maintain a constant voltage within the load limits of the circuit.

The basic circuit can be configured to step up (boost), step down (buck), or invert output voltage with respect to input voltage.

Why Use a Switching Regulator?

For battery management, the only other choice is a linear regulator. Linear regulators only step down, and efficiency is equivalent to the output voltage divided by the input voltage. On the other hand, switching regulators operate by passing energy in discrete packets over a low-resistance switch, so they can step up, step down, and invert. In addition, they offer higher efficiency than linear regulators.

Using a transformer as the energy-storage element also allows the output voltage to be electrically isolated from the input voltage.

The one disadvantage of the switching regulator is noise. Any time you move charge in discrete packets, you create noise or ripple. But the noise can often be minimized using specific control techniques and through careful component selection.

Charge Phase

A basic boost configuration is depicted in Figure 1. Assuming that the switch has been open for a long time, the voltage across the capacitor is equal to the input voltage. During the charge phase, when the switch closes the input voltage is impressed across the inductor and the diode prevents the capacitor from discharging to ground. Because the input voltage is DC, current through the inductor rises linearly with time at a rate that is proportional to the input voltage divided by the inductance. The energy stored in the inductor for the duration shown is equal to one-half the inductance times the square of the peak current.

Figure 1. Charge phase: When the switch closes, current ramps up through the inductor.

Discharge Phase

Figure 2 shows the discharge phase. When the switch opens again, the voltage across the inductor changes instantaneously to whatever is required to maintain current flow, because the inductor current can't change instantly. In order for current to continue flowing, the inductor voltage must change enough to forward-bias the diode. The voltage on top of the switch (at the diode anode) is equal to a diode forward voltage (VD) above the voltage on the capacitor, and the voltage across the inductor actually switches polarity relative to the charge phase. In this initial cycle, V-switch is equal to VIN plus VD. If we assume that the capacitor is relatively large such that the dV/dt for the resulting inductor peak current is negligibly small, then VOUT remains relatively constant during the second half of the cycle. As V-switch remains at a diode drop above VOUT, the voltage across the inductor also remains relatively constant. This results in a linear di/dt opposite in polarity from the charge phase and proportional to the inductor voltage divided by the inductance, -VD over L in this initial cycle.

Figure 2. Discharge phase: When the switch opens, current flows to the load.

If we continue this process over and over, the voltage across the capacitor (VOUT) will rise with every cycle. If we then employ some feedback and control (see Figure 7), the output voltage can be regulated at any value within the breakdown tolerance of the selected components.

If we take the same basic elements and rearrange their positions, we can create the other configurations such as the buck converter topology (see Figure 3). Here, when the switch closes, the voltage across the inductor is equal to VIN minus VOUT. Initially this is VIN, because VOUT is zero at startup. Current will ramp up linearly, as in the boost case (Figure 4), and flow into the output capacitor. When the switch opens, the voltage across it will change instantaneously to allow current to flow through the diode and the inductor, and into the output capacitor. Because energy is gated to the output capacitor in each half of the cycle, the buck topology typically offers the greatest efficiency.

Figure 3. Buck converter topology

Figure 4. Simple boost converter

Keeping the switch in the same place and swapping the inductor and diode positions in the circuit yields the inverting topology (Figure 5). When the switch closes, VIN is impressed across the inductor and the current ramps up as before. When the switch opens again, the current wants to continue to flow in the same direction. Thus, it flows through the diode and charges the output capacitor in the reverse direction, creating an output voltage with the opposite polarity to the input voltage.

Figure 5. Inverting topology

Using a transformer, you can realize boost, buck, or inverting topologies and isolate the output voltage from the input voltage. The circuit shown in Figure 6 is a boost transformer flyback topology.

Figure 6. Transformer flyback topology

Control Techniques

Popular control techniques include pulse-frequency modulation, where the switch is cycled at a 50% duty cycle until the output voltage comes into regulation; current-limited pulse-frequency modulation, where the charge cycle terminates when a predetermined peak inductor current is reached; and pulse-width modulation, where the switch frequency is constant and the duty cycle varies with the load. Each of these control techniques has advantages and disadvantages.

Clocked pulse-frequency modulation, or PFM, is the simplest control technique. With this method, when the output voltage is below the regulation point the control circuit gates a free-running oscillator to the switch. The inductive charge pumping action boosts the output voltage back up to the regulation point. However, the inductor selection is complicated, the peak-to-peak voltage ripple can be quite high, and the noise/ripple spectrum will vary greatly with the load.

Current-limited pulse-frequency modulation is similar to standard PFM; but instead of using a 50% duty cycle oscillator, this control scheme employs a peak inductor current limit and a one shot. As soon as the output voltage goes out of regulation, the switch turns on until the inductor current reaches the programmed current limit, usually set with a current sense resistor in the inductor-current path. Once the inductor current reaches the programmed limit, the switch turns off for a time constant set by an internal one shot, generally on the order of a microsecond. At the end of the one-shot time constant, the feedback circuit compares VOUT to the regulation voltage and either turns the switch on again if VOUT remains out of regulation or holds the switch off until VOUT falls out of regulation. Because the inductor peak current is fixed, this control scheme makes inductor selection easier; you only need to size the inductor core to meet the fixed limit. Also, because the peak current is fixed, the peak-to-peak ripple is reduced over the standard PFM, although the noise spectrum still varies with the load.

Figure 7. Adding feedback and control

The pulse-width modulation, or PWM, control technique maintains a constant switching frequency and varies the ratio of charge cycle to discharge cycle as the load varies. This technique affords high efficiency over a wide load range. In addition, because the switching frequency is fixed, the noise spectrum is relatively narrow, allowing simple low-pass filter techniques to greatly reduce the peak-to-peak voltage ripple. For this same reason, PWM is popular with telecom applications where noise interference is of concern.

Figure 8 shows an example of the clocked PFM control scheme. VOUT is fed back through a voltage divider to one input of a comparator whose other input is connected to a reference voltage. When the divided-down VOUT falls below VREF, the comparator gates the square-wave oscillator to the switch. This causes it to rapidly open and close, storing energy in the inductor and transferring it to the output capacitor in each cycle.

Figure 8. Clocked pulse-frequency modulation

The current-limited minimum-off-time PFM scheme, depicted in Figure 9, is a bit more complicated. As with the clocked PFM, VOUT is fed back through a voltage divider to one input of a comparator whose other input is connected to a reference. The output of this comparator controls the trigger of a one-shot multivibrator. Another comparator looks at the peak inductor current as a voltage across a current sense resistor in the source of the N-channel MOSFET switch. When the output is out of regulation, the SR flip-flop turns the NMOS switch on until the voltage across the current sense resistor is equal to the reference voltage. The flip-flop resets, turning off the NMOS switch, the one-shot timer is triggered, and the switch remains off for the duration of the one shot, usually 1 microsecond. If the output voltage limiting comparator is still indicating an out-of-regulation condition, the flip-flop sets again and the cycle repeats itself.

Figure 9. Current-limited minimum-off-time pulse-frequency modulation

Pulse-width modulation comes in a couple of different flavors. In voltage-mode PWM, shown in Figure 10, the divided-down output voltage is fed to an amplifier whose output is the difference between a voltage reference and the divided-down output voltage. This "error voltage" sets the threshold of a comparator whose other input is connected to a ramp generator. The output of the comparator drives the main switch. On a cycle-by-cycle basis, the greater the error voltage, the higher the comparator threshold on the comparator, and the longer the switch is held on. As the switch is held on longer, the peak current in the inductor is allowed to climb higher, storing more energy to serve the load and maintain regulation.

Figure 10. Voltage-mode pulse-width modulation

Current-mode pulse-width modulation (Figure 11) works in a similar fashion but with a key difference. As with the voltage-mode PWM, the divided-down VOUT is fed to a different amplifier whose output is the difference between the fed-back VOUT and a voltage reference. However, instead of setting the threshold on a ramp generator, this scheme employs a current sense resistor to sense the inductor current and flip-flop to control the switch. With each cycle, the switch is turned on by a pulse oscillator and the current in the inductor ramps up to the threshold set by the error voltage. This control scheme tends to be a bit easier to stabilize than the voltage-mode PWM.

Figure 11. Current-mode pulse-width modulation

In striving for maximum efficiency, one of the largest power-loss factors to consider is that through the diode. The power dissipated is simply the forward voltage drop multiplied by the current going through it. This power dissipation (loss) reduces overall efficiency. To minimize this loss, most DC-DC switching regulator circuits use Schottky-type diodes whose relatively low forward voltage drop and high speed minimize losses. However, for maximum efficiency, you can use a switch in place of the diode. This is known as "synchronous rectification" (see Figures 12 and 13). The synchronous rectifier switch is open when the main switch is closed, and the same is true conversely. To prevent "crowbar" current that would flow if both switches were closed at the same time, the switching scheme must be break-before-make. Because of this, the diode is still required to conduct the first bit of current during the interval between the opening of the main switch and the closing of the synchronous rectifier switch.

Figure 12. Synchronous rectification


Figure 13. Example: Synchronous rectified buck regulator

Another variant of PWM is the Idle-Mode™ PWM scheme (Figure 14). This technique combines the best of PFM's efficiency at light loads and PWM's efficiency and low-noise characteristics at higher loads. Thus, at light loads it acts similar to a PFM, skipping pulses as necessary, and at higher loads it acts as a PWM, affording the maximum efficiency over the widest possible load range.

Figure 14. Idle Mode™ PWM

In Figure 15, we see that the efficiency with Idle-Mode PWM is greater than 90% with V+ = 6V from 20mA or to just over 5A!

Figure 15. Efficiency with Idle Mode