The demands of data transfer across the expansion bus have continued to evolve faster than the throughput of classical ISA/EISA bus architectures allow. The volumes of data required by graphic user interfaces (such as Microsoft’s Windows) present serious challenges to conventional video adapter and memory design. Early in 1992, the Video Electronics Standards Association (VESA) proposed a new local bus standard called the VESA Local bus (or VL bus - also dubbed the Video Local bus) intended to improve the performance of graphics and video sub-systems. In general terms, a "local bus" is a pathway that allows peripherals to access the system’s main memory quickly. For the VL bus, such improved access means higher data throughput and performance for video information at the speed of the CPU itself. By using a stand-alone bus for video, ISA or EISA busses can be implemented for backward system compatibility - that is, users can upgrade to a new motherboard and graphics card, but all other peripherals and software remain compatible.

Of course, the path to a "standard" local bus was not an easy one. In 1991 and 1992, a few chip set suppliers and manufacturers implemented non-standard high-performance I/O buses. For example, some OPTi chip sets were designed to support an OPTi local bus. Unfortunately, the OPTi local bus was supported by only a small handful of manufacturers, and since the OPTi approach was specific to their chip sets, few (if any) I/O cards were ever actually developed for these buses and few manufacturers provided them. Thus, OPTi and other proprietary buses met the same fate as all other non-standardized approaches in the PC industry - they disappeared. However, the failure of proprietary local bus designs did not prevent industry acceptance of a "standard" VL bus design developed by the VESA (Video Electronics Standards Association) in late 1992. By placing the VL extension connectors in-line with standard ISA connectors, the VL board can also serve as an ISA board - only with far higher data throughput.

The essential advantage of a VL bus is direct access to the CPU’s main busses. This allows a VL device to rapidly transfer the large quantities of data that are vital for high-performance video under Windows (and now Windows 95). Further, the VL bus operates at the motherboard’s bus speed rather than a fixed 8.3MHz like the ISA bus. As a result, faster CPU speed will result in faster bus speed. Unfortunately, this is where the advantages end.

While virtually direct connection to the CPU may seem like a real asset, there are also some serious drawbacks that you should understand. Processor dependence can ultimately become a disadvantage for the VL bus. Since higher processor speed results in higher bus capacitance, VL signals can loose reliability at high CPU clock frequencies. Further, the processor signals were intended to attach to only a few chips (like the RAM controller) and have very precise timing rules. In fact, each type of Intel i486 chip (i.e. i486SX, i486DX, and i486DX/2) has slightly different timing requirements. When additional capacitance loads are added by adding multiple connectors and multiple local-bus chips, all sorts of undesirable things can happen. The two most likely problems are; data "glitches" due to slowed processor bus signals; and out-of-spec timing for different I/O cards with different loading characteristics.

NOTE: We mention i486-type CPUs in this paragraph because the VL bus had largely fallen into disuse by the time Pentium processors arrived. You will only rarely (if ever) find a Pentium motherboard fitted with VL bus slots.

Although the VL specification does not list an upper frequency limit, the potential load problems discussed above dictate a practical limit. With a clock speed of 33MHz, a VL motherboard should be able to support two VL devices reliably. At 40MHz, only one VL device should be used. Above 40MHz, the chances of unreliable operation with even one VL device become substantial. If you find yourself working on a fast VL system with random system errors, see if the problem goes away when the VL device(s) are removed (and replaced with ISA equivalents if necessary).

Another problem is the lack of concurrency. For a PCI bus, the CPU can continue operating when a PCI device takes control of the system busses. VL architecture also allows for bus mastering operation, but when a VL device takes control of the bus, the CPU must be stopped. While this is technically not a defect, it clearly limits the performance of high-end devices (i.e. SCSI controllers) that might attempt to use a VL architecture. Finally, there are several other disadvantages to the VL bus. It is a +5Vdc architecture (where PCI can support +3.3Vdc). Unlike PCI, there is no "auto-configuration" capability in the VL bus (jumpers and DIP switches are required), so Plug-and-Play operation is not supported.

The VL bus uses a 116 pin card edge connector with small contacts (similar in appearance to MicroChannel contacts) as shown in Fig. 52-1. The most recent VL bus release (2.0) offers a 32-bit data path with a maximum data throughput of about 130MB/sec. The pinout for a VL bus is illustrated in Table 52-1. One of the most interesting things to note about the VL bus is that it is an extension to the standard ISA/EISA bus. The two right connectors are standard 16-bit ISA bus connectors. It is the two right-most connectors that provide the VL compatibility. The long VL connector portion provides the 32-bit VL support. This is different than the PCI bus which does not use ant part of the ISA bus.

The Data/ -Command (D/ -C) signal tells whether information on the bus is data or a command. Clock signals from the CPU are provided through the Local Bus Clock (LCLK) line. Memory/ -I/O (M/ -I/O) distinguishes between memory and I/O access, while the Write/ -Read (W/ -R) signal differentiates between read or write operations. The -Byte Enable lines (-BE0 to -BE7) indicate which 8 bit bytes of the data bus are being transferred. A -Reset signal (-RESET) will initialize the VL device. The -Ready Return (-RDYRTN) line indicates that the VL bus is free for access. Data bus width is determined by the -Local Bus Size 16 (-LBS16) signal.

Accessing the VL bus is a process of arbitration - much like the arbitration that takes place on an MCA or EISA bus. Each VL device is defined by its own ID number (ID0 to ID4). The -Local Bus Ready (-LRDY), -Local Bus Device (-LDEV), -Local Bus Request (-LREQ), and -Local Bus Grant (-LGNT) lines are used to negotiate for control of the VL bus. In most cases, there is only one VL device on the bus, but arbitration must be performed to ensure proper access to memory.

In most cases, you will not be troubleshooting a bus - after all, the bus is little more than a passive connector. However, the major signals that exist on a VL bus can provide you with important clues about the system's operation. The most effective bus troubleshooting tool available to you is a POST board (such as the ones discussed in Chapter 19). Many POST boards are equipped with a number of LEDs that display power status, along with important timing and control signals. If one or more of those LEDs is missing, a fault has likely occurred somewhere on the motherboard. Keep in mind that the vast majority of POST boards are designed for the ISA bus. You can plug a POST board (with a built-in logic probe capable of 33MHz operation) into an ISA connector (which will check the ISA portion of the VL connector arrangement), then use the logic probe to test key signals on the VL extension. Since the signals on a VL extension are quite different than those on an ISA bus, try the following signals:

• Voltage - use your multimeter and check each voltage level on the VL bus. You should be able to find +5Vdc. If any of these supply levels are low or absent, troubleshoot or replace the power supply.
• LCLK (pin A56) - the Local Bus Clock signal provides timing signals for the expansion device. It will typically be at the processor frequency. If this signal is absent, the expansion board will probably not run. Check the clock generating circuitry on the motherboard, or replace the motherboard outright.
• -RESET (pin A42) - the Reset line can be used to re-initialize the VL expansion device. This line should not be active for more than a few moments after power is applied, or after a warm reset is initiated.
• M/-I/O (pin A44) - the Memory/-I/O line indicates whether memory or I/O locations are being accessed. You can expect this signal to flicker or remain dim since it should switch modes very regularly. A problem here usually indicates a problem with the CPU or intervening logic. Try replacing the motherboard.
• W/-R (pin A45) - the Write/-Read line defines whether data is being read or written across the bus. This signals should also flicker or remain dim since it should switch modes regularly. Problems with this signal usually indicate a problem with the CPU or intervening logic. Try replacing the motherboard.
• -LRDY (pin B48) - the Local Bus Ready signal tells VL devices that the bus is ready for use. If this signal is frozen at logic 1, the VL device may not be releasing the bus, or a problem with motherboard logic may be disabling the bus. Try removing the VL device or moving it to another slot. If that fails, try replacing the motherboard.

Another point to consider is that bus connectors are mechanical devices - as a result, they do not last forever. If you or your customer are in the habit of removing and inserting boards frequently, it is likely that the metal "fingers" providing contact will wear and result in unreliable connections. Similarly, inserting a board improperly (or with excessive force) can break the connector. In extreme cases, even the motherboard can be damaged. The first rule of board replacement is; always try removing and re-inserting the suspect board. It is not uncommon for oxides to develop on board and slot contacts that may eventually degrade signal quality. By removing the board and re-inserting it, you can wipe off any oxides or dust and possible improve the connections.

The second rule of board replacement is; always try a board in another expansion slot before replacing it. This way, a faulty bus slot can be ruled out before suffering the expense of a new board. Keep in mind that many current VL motherboards have only one or two VL slots - the remainder are ISA slots. If a bus slot proves defective, there is little that a technician can do except:

1. block the slot and inform the customer that it is damaged and should not be used.
1. replace the damaged bus slot connector (a tedious and time-consuming task) and pass the labor expense on to the customer.
1. replace the motherboard outright (also a rather expensive option).

Although the VL-bus is generally considered to be a sound (but dated) bus architecture, there were some perplexing issues that sometimes cropped up on the workbench. The two major issues to contend with are bus speed and VL device types.

• Bus speed - the VL bus is linked to the CPU clock speed. This was fine when CPUs ran at 33MHz or less, but the VL bus wasn’t intended to support higher clock speeds. Clock speeds higher than 33MHz (often activated when a late-model i486 motherboard was upgraded with an OverDrive processor), could cause signal degredation - the VL device(s) would malfunction. Whenever you encounter difficulty on a VL motherboard, always verify that the bus speed is 33MHz or less. Note that a single well-designed VL board can often run up to 40MHz (sometimes 50MHz), but this is extremely rare, and should never be expected.
• Multiple VL devices - the VL bus was originally intended as a single-slot architecture (primarily for high-performance graphic accelerators of the day). When designers expanded the role of VL and added more VL slots, the potential for signal degradation increased. More than two VL devices often cause problems on VL motherboards (especially at clock speeds over 33MHz).

That it for Chapter 52. Be sure to review the glossary and chapter questions on the accompanying CD. If you have access to the Internet, take some time to review the VL bus resources listed below:

VESA (Video Electronics Standards Organization): http://www.vesa.org