Simulation

        Here is a simulation of a basic flip-flop circuit build using NAND gates.  Experiment with this circuit, checking out the truth table, and be sure to focus on the situation where two different states can exits.  In the simulation, you can change the state of each switch by clicking on the adjacent buttons.

Moving Toward A One-Bit Memory Element - Making the Flip-Flop Useful

        We're going to add some circuitry to our flip-flop to make it more usable.  Here is another simulation with a bit more circuitry.  We'll work toward understanding that circuitry shortly.

Simulation

        Here is a simulation of a more complex flip-flop.  In this flip-flop, do the following.

• Set the data you want to store in the flip-flop.  The data input is at the left in the circuit.  There's only one bit in the data.
• Pulse the clock high for a short time, and then reset it to low.
• Notice that the data can change.  (Try changing it yourself.)  However, the data that is stored in the flip-flop (which is the data you see at the output) is the data that was present when the clock cycled high.  After that you can change the data till the cows come home and the output won't change until the next time you cycle the clock high.

        If we look at the simulation above, we see that the circuit takes a data input bit and transfers it to the output when the clock goes through a cycle - from 0 to 1 and back to zero.  After the clock pulse becomes zero, then the output is held - i.e. remembered - until another clock pullse comes along and reads the value of A then into the circuit.

Exercise

        Try it again to be sure that you understand it.  Make the data input a 1 and store it, then make the data input a 0 and store it.

        Well, so far we have a one-stage memory storage device.  Next, we're going to duplicate this single stage and have it drive a second stage.  There's a good reason for that.  In this circuit we might end up trying to change the output at the same time we are trying to read the output.  That would never do, so we're going to devise a circuit that will hold the output constant in a second stage while we put the input into the first stage.  However, if we draw all of the components we won't be able to show the whole thing.  So, we going to encapsulate the entire circuit above with just the data input, the clock input and the top output showing.  Note, we only need to have one output available since the two outputs of the flip-flop are always complements.

        You should also be aware that engineers really like to be able to use higher order abstractions for devices.  The logic gates (NAND gates in the flip-flop) are really composed of transistors, and the flip-flops are really composed of gates.  But, you can't always work at the transistor level when you are constructing circuits with gates, and you, similarly, can't always work at the gate level when you are constructing circuits with flip-flops.

Now, working with the simpler representataion, experiment with it to be sure that you understand how it works, and in particular be sure that you can see that this device stores a single bit.

Exercise

Now, at this level of abstraction, we can check out the operation of the single stage flip-flop.  Run this simulation and notice how the output changes on the leading edge of the clock pulse, C.

        There's a problem with this memory element.  If this element is embedded in a system in which you want to read new information into the memory element at the same time as you are reading information from the element, those two things are happening at the same time.  A more desirable situation would be to have a circuit in which the output was guaranteed to stay constant while the input is being loaded.  A two-stage memory element is used for that.  Here is a simulation.  In this simulation, note the following.

• There are really two flip-flops in this circuit, but there is only one clock and one data input.
• The clock is used to put the data into the first flip-flop (when it becomes "1"), but when the clock becomes "0", the not-clock (the inverted clock signal) becomes "1", and puts the data (now at the output of the first flip-flop) into the second flip-flop.
  • Actually, we would normally say that the data is gated into the first flop-flop on the leading edge of the clock pulse, and then gated into the second flip-flop on the trailing edge of the clock pulse.

Exercise