Switching in Telecommunications

A Generic Switch Architecture

A generic switch consists of a switching mechanism, interfaces to the switching mechanism and a control mechanism.

The switching mechanism connects a subscriber on a device interface to another subscriber on another device interface of the same switch, or to a subscriber connected to the device interface of another switch via the trunk interfaces.

The control mechanism is responsible for coordinating the actions of the switching mechanism, the device interfaces, the trunk interfaces and network resources in conjunction with other switches. The control mechanism accepts inputs from peripheral devices through their interfaces and translates these inputs into actions that provide system services.

The early electronically controlled switches executed a control algorithm implemented in hardwired logic. Changes to the control structure and the addition of new features required a change in the circuitry. Modern switches operate under the direction of software that resides in the memory of the control mechanism. One or more CPUs in a switch execute the control algorithm.

The control functions may be partitioned into asynchronous event driven tasks and synchronous time driven tasks. The event driven tasks are associated with processing requests from user devices and peripherals. Devices signal a need for service by changing state, such as going from on-hook to off-hook or by entering control commands. Time driven tasks are initiated repetitively by some component of the control mechanism itself, e.g., diagnostics which are conducted periodically to determine an up to date picture of system’s health.

Early manual and electromechanical switches employed space division multiplexing. These systems established connections between the switch ports by providing a unique dedicated path for each conversation. A single source port and a single destination port occupied a full duplex physical path for the duration of the call.

Modern digital switches employ high bandwidth data buses that are shared between various terminal equipment. These terminals access the data bus through the bus interfaces which provide one or more device ports. The switches concentrate data on the data bus before switching. Switching can occur on a switching network attached to the bus or on the bus itself. The data bus operates at a very high speed to support many users. The terminals are connected to the switch ports via lower speed links.

Time division multiplexing is a means of allocating bus bandwidth and can be used to accomplish a switching function. For example, consider a 64kbps PCM encoded voice signal that is obtained by taking 8000 samples per second of a speech signal. Each sample is digitised to an 8 bit word. Using an 8 bit bus, this voice signal can be transmitted from a source to a destination by transmitting an 8 bit sample over the bus 8000 times each second. This corresponds to 8000 bus cycles per second. If the bus rate is doubled to 16000 bus cycles per second, an additional connection between another source and another destination can be accomodated by alternating the use of the bus between the first and the second connection.

Thus the bus may be considered as providing a frame which repeats 8000 times every second. This frame consists of two consecutive time slots. By allowing the first source and destination pair to exchange data during the first time slot and the second source and destination pair to exchange data during the second time slot, the two connections are multiplexed onto the common bus.

Owing to the high speed at which semiconductor switches operate, space switches may be multiplexed in time and shared among a number of simultaneous connections. In time multiplexed space (TMSD) switching, an array of space switches may be instructed to set up a new set of connections between its inputs and outputs during each time slot. Such a switch is known as a time multiplexed switch (TMS).

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© Omar Bashir, December 1998

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