List of  a Few   Papers published *:

Sl. No.

Title of Paper

Author(s)

Name & Vol. Of Journal & year

Page No.

From

To

1

CAD for VLSI

Niranjan N.Chiplunkar

The ieee Annual, Journal, MIT, Manipal, May 1992

25

27

2

CAD for VLSI design

Niranjan N.Chiplunkar

“CSI Communication”  Journal, June 1993

11

14

3

Layout Compaction of VLSI circuits –an overview

Niranjan N.Chiplunkar

“MIT Technical Review” journal, vol. 4 Dec 1996

58

64

4

Technology mapping in FPGAs

Niranjan N.Chiplunkar

Proc. Of National Conference on IT for 21st Century, Surathkal, India, 19-21st Dec.1996

32

38

5

Algorithm for Area Optimization in LookupTable based FPGA Technology mapping

Niranjan N.Chiplunkar & Dr.Chitrasena Bhat

Proc. Of annual CSI convention, NewDelhi, Sept. 1998

149

155

6

Heuristic technology mapper for LUT based FPGAs

Niranjan N.Chiplunkar & Dr.Chitrasena Bhat

Proc. Of IEEE’s 12th International Conf. On VLSI Design, Goa,India Jan.1999

390

393

7

Computational Aspects of certain Placement and Routing algorithms of VLSI system

Niranjan N.Chiplunkar &  Manoj V.N.

Proc. Of 2nd National Conference on Advanced Computing, PSG Tech, Coimbatore, India, Feb. 2002

51

55

8

Application of Chinese Remainder Theorem in designing a High sped RSA crypto chip

Niranjan N.Chiplunkar , Manoj V.N. & Manjaiya

Proc. Of 2nd National Conference on Advanced Computing, PSG Tech, Coimbatore,India, Feb. 2002

37

46

9

Design of High speed RSA cryptor Chip

Niranjan N.Chiplunkar , Manoj V.N. & Manjaiya

Abstract. Of National Conf. On Signals, systems and Security, PSG Tech., Coimbatore,India, March 2002

32

32

10

Review of Spatial DataBases

Niranjan N.Chiplunkar

Proc. Of National Conference on “Recent Trends in DBMS, concepts & Practice”, Nitte,India,  March 2002

209

216

11

E-Learning:Use of IT in Teachning Learning Process

Niranjan N.Chiplunkar

Proceedings of 32nd National Convention of ISTE(Indian Society for Technical Education), 27-29, Dec.2002

62            

63

12

Multi FPGA system and its applications

Ganapathi Hegde & Niranjan N.Chiplunkar

Proc. Of PGFEST 2003, 25-26th July 2003, NMAMIT, Nitte

RS35

 

13

Design Implementation and analysis of Group communication using key graphs

Nagesh H.R. , K.Chandrashekharan, and Niranjan N.Chiplunkar

Proc. Of National conf. on “Recent Trends in Network Technology”, 13-15th Dec. 2003, Karpagam Engg. College, Coimbatore

 

 

14

RMI and CORBA –a framework for Distributed Computing application Development

Niranjan N.Chiplunkar

Proc. Of National Conference on “Control, Communication and Information Systems: Volume II”, 23-24th Jan. 2004, Farmagudi, Goa

1

5

15

High level partitioning with synthesis for Multi-FPGA systems

 

Ganapathi Hegde and Niranjan N.Chiplunkar

    -”-

 9

13

16

Distributed Computing in VLSI design

Ashok Kumar and Ganapathi Hegde

 -”-

20

24

17

Application and Management of reconfigurable computing using operating systems

Ganapathi Hegde and Niranjan N.Chiplunkar

Proc. Of National Conference on Distributed Computing, NCDC-2004, NMAMIT, Nitte

168

173

18

Distributed computing and JAVA

Niranjan N.Chiplunkar

        -“-

183

187

19

SURAKSHA: An implementation of Secure Group Communications

H.R.Nagesh, K.Chandrashekharan and Niranjan N.Chiplunkar

Proc. Of 12th International conference on “Advanced Computing and Communications, Nirma Inst. Of Technology, Ahmedabad

286

294

20

Role of information technology in enhancing the effectiveness of continuing education

Dr.Srinivas Pai, Dr.Niranjan N.C.

36th  ISTE Annual Convention and National Seminar, 14-16th Dec. 2006,Bannari Amman Inst. Of Tech., satyamangala, T.N., India

28

(only abstract)

 

21

Security issues in wireless network

Yuvaraju, Manjunath Kotari, Niranjan N.C.

Proceedings of 3rd International Conference ObCom-2006.Mobile, Ubiquitous & Pervasive Computing, Dec. 16-19, 2006, VIT,Vellore, India. Volume-II

210

212

 

 

 

 

 

 

 

 

        * This list does not include the details of a paper titled “Technology mapping in VLSI” presented by me and later published on the Internet. This presentation was made in “VLSI Design Workshop” held at Chennai in the International Conference on VLSI design during Jan 1997.

 

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