Model { Name "part1" Version 4.00 SampleTimeColors off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes off RecordCoverage off CovPath "/" CovSaveName "covdata" CovNameIncrementing off CovHtmlReporting on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off Created "Wed Oct 13 14:21:36 2004" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "Aula B" ModifiedDateFormat "%" LastModifiedDate "Wed Oct 20 16:14:31 2004" ModelVersionFormat "1.%" ConfigurationManager "none" SimParamPage "Solver" StartTime "0.0" StopTime "10" SolverMode "SingleTasking" Solver "ode4" RelTol "1e-3" AbsTol "auto" Refine "1" MaxStep "auto" MinStep "auto" MaxNumMinSteps "-1" InitialStep "auto" FixedStep "1/1000" MaxOrder 5 OutputOption "RefineOutputTimes" OutputTimes "[]" LoadExternalInput off ExternalInput "[t, u]" SaveTime on TimeSaveName "tout" SaveState off StateSaveName "xout" SaveOutput on OutputSaveName "yout" LoadInitialState off InitialState "xInitial" SaveFinalState off FinalStateName "xFinal" SaveFormat "Array" LimitDataPoints on MaxDataPoints "1000" Decimation "1" AlgebraicLoopMsg "warning" MinStepSizeMsg "warning" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" InheritedTsInSrcMsg "warning" SingleTaskRateTransMsg "none" MultiTaskRateTransMsg "error" IntegerOverflowMsg "warning" CheckForMatrixSingularity "none" UnnecessaryDatatypeConvMsg "none" Int32ToFloatConvMsg "warning" SignalLabelMismatchMsg "none" LinearizationMsg "none" VectorMatrixConversionMsg "none" SfunCompatibilityCheckMsg "none" BlockPriorityViolationMsg "warning" ArrayBoundsChecking "none" ConsistencyChecking "none" ZeroCross on Profile off SimulationMode "normal" RTWSystemTargetFile "grt.tlc" RTWInlineParameters off RTWRetainRTWFile off RTWTemplateMakefile "grt_default_tmf" RTWMakeCommand "make_rtw" RTWGenerateCodeOnly off TLCProfiler off TLCDebug off TLCCoverage off AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" ExtModeMexFile "ext_comm" ExtModeBatchMode off ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeLogAll on OptimizeBlockIOStorage on BufferReuse on ParameterPooling on BlockReductionOpt off BooleanDataType off BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "part1" Location [210, 521, 943, 737] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "automatic" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" ZoomFactor "100" AutoZoom on ReportName "simulink-default.rpt" Block { BlockType Mux Name "Mux" Ports [2, 1] Position [470, 71, 475, 109] ShowName off Inputs "2" DisplayOption "bar" } Block { BlockType Scope Name "Scope" Ports [1] Position [505, 74, 535, 106] Floating off Location [640, 82, 964, 321] Open off NumInputPorts "1" TickLabels "OneTimeTick" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" } Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData4" DataFormat "StructureWithTime" LimitDataPoints off MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "0" } Block { BlockType SignalGenerator Name "Signal\nGenerator" Position [40, 15, 70, 45] WaveForm "sine" Amplitude "1" Frequency "20" Units "rad/sec" VectorParams1D on } Block { BlockType SignalGenerator Name "Signal\nGenerator1" Position [125, 60, 155, 90] WaveForm "sine" Amplitude "1" Frequency "1" Units "Hertz" VectorParams1D on } Block { BlockType Sin Name "Sine Wave" Position [60, 125, 90, 155] Amplitude "1" Frequency "330" Phase "0" SampleTime "0" VectorParams1D on } Block { BlockType SubSystem Name "hola" Ports [3, 1] Position [255, 38, 325, 122] ShowPortLabels on TreatAsAtomicUnit off RTWSystemCode "Auto" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" System { Name "hola" Location [59, 281, 1024, 641] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "automatic" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" ZoomFactor "100" AutoZoom on Block { BlockType Inport Name "seenyal1" Position [45, 55, 75, 69] Port "1" Interpolate on } Block { BlockType Inport Name "senyal2" Position [60, 95, 90, 109] Port "2" Interpolate on } Block { BlockType Inport Name "portadora" Position [25, 245, 55, 259] Port "3" Interpolate on } Block { BlockType SubSystem Name "Demodulació SSB" Ports [2, 1] Position [775, 29, 840, 111] ShowPortLabels on TreatAsAtomicUnit off RTWSystemCode "Auto" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" System { Name "Demodulació SSB" Location [241, 278, 1024, 559] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "automatic" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" ZoomFactor "100" AutoZoom on Block { BlockType Inport Name "In1" Position [450, 45, 480, 59] Port "1" Interpolate on } Block { BlockType Inport Name "In2" Position [440, 60, 470, 74] Port "2" Interpolate on } Block { BlockType Reference Name "Analog\nFilter Design2" Ports [1, 1] Position [600, 22, 665, 78] SourceBlock "dsparch3/Analog\nFilter Design" SourceType "Analog Filter Design" method "Butterworth" filttype "Lowpass" N "8" Wlo "30" Whi "330" Rp "2" Rs "40" } Block { BlockType Reference Name "Dot Product1" Ports [2, 1] Position [505, 41, 535, 74] SourceBlock "simulink3/Math/Dot Product" SourceType "Dot Product" } Block { BlockType Gain Name "Gain3" Position [680, 35, 705, 65] Gain "10" Multiplication "Element-wise(K.*u)" SaturateOnIntegerOverflow on } Block { BlockType Outport Name "Out1" Position [730, 45, 760, 59] Port "1" OutputWhenDisabled "held" InitialOutput "[]" } Line { SrcBlock "Dot Product1" SrcPort 1 Points [45, 0] DstBlock "Analog\nFilter Design2" DstPort 1 } Line { SrcBlock "Analog\nFilter Design2" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Dot Product1" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Dot Product1" DstPort 2 } } } Block { BlockType SubSystem Name "Modulació SSB" Ports [2, 1] Position [375, 88, 455, 177] ShowPortLabels on TreatAsAtomicUnit off RTWSystemCode "Auto" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" System { Name "Modulació SSB" Location [206, 309, 706, 557] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "automatic" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" ZoomFactor "100" AutoZoom on Block { BlockType Inport Name "senyal1" Position [25, 35, 55, 49] Port "1" Interpolate on } Block { BlockType Inport Name "senyal2" Position [120, 140, 150, 154] Port "2" Interpolate on } Block { BlockType Reference Name "Analog\nFilter Design1" Ports [1, 1] Position [355, 27, 420, 83] SourceBlock "dsparch3/Analog\nFilter Design" SourceType "Analog Filter Design" method "Butterworth" filttype "Bandpass" N "40" Wlo "270" Whi "330" Rp "2" Rs "40" } Block { BlockType Reference Name "Dot Product" Ports [2, 1] Position [185, 121, 215, 154] SourceBlock "simulink3/Math/Dot Product" SourceType "Dot Product" } Block { BlockType Gain Name "Gain1" Position [80, 25, 110, 55] Gain "1" Multiplication "Element-wise(K.*u)" SaturateOnIntegerOverflow on } Block { BlockType Outport Name "surtida0.5" Position [445, 50, 475, 64] Port "1" OutputWhenDisabled "held" InitialOutput "[]" } Line { SrcBlock "Gain1" SrcPort 1 Points [0, 90] DstBlock "Dot Product" DstPort 1 } Line { SrcBlock "Dot Product" SrcPort 1 Points [120, 0] DstBlock "Analog\nFilter Design1" DstPort 1 } Line { SrcBlock "senyal1" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Analog\nFilter Design1" SrcPort 1 DstBlock "surtida0.5" DstPort 1 } Line { SrcBlock "senyal2" SrcPort 1 DstBlock "Dot Product" DstPort 2 } Annotation { Position [91, 26] } } } Block { BlockType Sum Name "Sum" Ports [2, 1] Position [100, 75, 120, 95] ShowName off IconShape "round" Inputs "|++" SaturateOnIntegerOverflow on } Block { BlockType Outport Name "surtida" Position [910, 45, 940, 59] Port "1" OutputWhenDisabled "held" InitialOutput "[]" } Line { SrcBlock "Sum" SrcPort 1 Points [85, 0; 0, 25] DstBlock "Modulació SSB" DstPort 1 } Line { SrcBlock "Modulació SSB" SrcPort 1 Points [0, -65; 135, 0; 0, -20] DstBlock "Demodulació SSB" DstPort 1 } Line { SrcBlock "Demodulació SSB" SrcPort 1 Points [0, -20] DstBlock "surtida" DstPort 1 } Line { SrcBlock "seenyal1" SrcPort 1 Points [0, 25] DstBlock "Sum" DstPort 1 } Line { SrcBlock "senyal2" SrcPort 1 DstBlock "Sum" DstPort 2 } Line { SrcBlock "portadora" SrcPort 1 Points [150, 0] Branch { Points [0, -75; 75, 0; 0, -20] DstBlock "Modulació SSB" DstPort 2 } Branch { Points [410, 0; 0, -160] DstBlock "Demodulació SSB" DstPort 2 } } } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Scope" DstPort 1 } Line { SrcBlock "hola" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Sine Wave" SrcPort 1 Points [145, 0] DstBlock "hola" DstPort 3 } Line { SrcBlock "Signal\nGenerator" SrcPort 1 Points [105, 0] Branch { Points [60, 0] DstBlock "hola" DstPort 1 } Branch { Points [0, -20; 185, 0; 0, 90] DstBlock "Mux" DstPort 2 } } } }