Dung Duc Nguyen

Chandler, AZ 85224

[email protected]



          To obtain advanced skills in circuit design.



           Arizona State University, Tempe, AZ 85287

           Master of Science in Electrical Engineering Specializing in Circuit Design (May ‘03)

           Michigan State University, East Lansing, MI 48824

           Bachelor of Science in Electrical Engineering (December ‘99)

           Honors and activities :

           Butler Scholarship, Honor Dean’s list, Brown, W. R. Engineering Scholarship,

           Yates Memorial Engineering Scholarship, National Society of Professional Engineers.



           Motorola, Tempe, AZ,  85284 Feb. ‘00-Present

           RF IC circuit designer (Feb. ’01 – Present)

           · Design, layout, and test RF transceiver front-end integrated circuits including mixers and

              low noise amplifiers (LNAs).

           · Technologies include CDR1 BiCmos, Hip6.

           Engineer Rotation Program(ERP) (Feb. ’00 – Feb. ’01)

           Being Chairperson of the Phoenix SPS ERP website committee besides rotating through four rotations.

           1st Rotation:  Product Engineering, WSSG, RF/IF Division., CDMA Operations.

           · Developed and analyzed a passivation layer for the newly developed integrated copper


           2nd Rotation: RF Design,  NCSG, Wireless Infrastructure System Divsion (WISD).

           · Characterize small signal (s-parameter) and large signal (load-pull).

           · Design impedance matching network for a discrete amplifier at 3.5 GHz using microstrip lines.

           3rd Rotation: System Architecture and verification, ASP, Coldfire Microprocessor Group.
          · Synthesize and run benchmarks for a Debug-Time-Translator module that translates the output

             of the microprocessor to half speed.

           4th Rotation: Circuit Design and Verification, WSSG, RF/IF Division, Power Management Group.
          · Design small circuits and simulate in Cadence with Smartmos5 technology.
          · Write Verilog models and run test-bench to verify circuit blocks.

           Motorola , Northville, MI.

           Engineering Intern  (May ‘99-Aug. ’99).

           Transportation System Group (TSG)

           · Performed benchmarks to evaluate the automotive Motorola PowerPC555 microcontroller

              performance conducted on both software and hardware.

           · Defined register bit fields for this microcontroller.

           · Verified specifications of the airbag RESCCU IC on testbench and designed circuits to test this IC.

           IBM  Rochester, MI,

           Hardware Intergration (co-op) (May ‘98-Sept. ‘98.)

           · Performed various bench tests (Performance Evaluation Varying Tests) on the

              IBM AS/400 and RS/6000 midrange server systems.

           · Updated department webpage.



           ·  PCs, Macintosh, Unix

           ·  C++, C, Assembly Language, HTML, VHDL, Matlab, Pspice,  Tanner Tools (L-Edit), Xilinx, Mathematica,

               Agilent ADS RF design tool, Cadence tools, Mcspice, Spectre, Assura, etc.

           ·  Circuits designed include A/D converters, RF mixers, Low Noise Amplifiers, Op-amps, Audio Amplifier,

               and other digital circuits.



           Available upon request






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