Design of the Variable Frequency Signal Clock Generator

Since the frequency of the system needed to be 500 MHz, TTL logic was not an option. By using PECL logic, the frequency specification could be achieved. The only difficulty with PECL logic is the transmission lines must be terminated with a 50 ohm impedance to a positive 3 volts. This presents a problem with the amount of available room on the circuit board, which is discussed in the next section. The design of the system began with the Motorola MC12430, which is a clock generator itself that uses PECL logic. The chip has 11 pins to select the output frequency, which ranges from 50 MHz to 800 MHz in 50 MHz increments. The highest frequency necessary for the channel sounder was 500 MHz, so none of the frequencies above 500 MHz were used. Since lower frequencies are needed for high density areas, one simple chip would not meet the requirements of the project. This is the reason for a divider chip in the latter stages of the design. The MC12430 was driven by the 10 MHz rubidium signal, which was multiplied up in frequency and then run through a phase-locked loop circuit that produced an accurate output frequency. The chip also has a parallel load and enable pin. In the designed system, a toggle switch was high when the output was enabled. When the user wished to change the frequency, the switch was toggled low, which loaded in the new values of the input pins.

The output of the MC12430 was input into a differential receiver, which was used as a buffer for the signal. The Motorola MC10EL16 was the chip chosen, which uses PECL logic. The signal was then split into two identical signals by using a Motorola PECL clock distribution chip, namely the MC10EL15. Two separate signals were necessary for the system because one of the signal frequencies needed to be divided. One of the signals ran into a Motorola MC10EL33, which is a divide by 4 chip. This leaves a frequency range of 12.5 MHz to 125 MHz in 12.5 MHz increments for the signal using the MC10EL33. Therefore, the lower frequencies can be reached when needed. The undivided signal propagated into a multiplexer, which was used to select the output frequency. The Motorola MC10EL57 was used on the output to choose between the 10 MHz input signal, the output signal of the MC12430, or the divided output signal of the MC12430. The multiplexer logic for the output frequencies can be found in Table 1 below. Another clock distribution chip was necessary for the rubidium signal, since one signal drove the MC12430, while the other was displayed on the output if requested. This chip, the Motorola MPC947, was necessary because it used TTL logic, which is the logic of the rubidium input signal. A voltage divider circuit was used to provide the chip with 3.3 volts since that particular voltage was not readily available. Since a PECL logic multiplexer was used, a Motorola MC10ELT20, or TTL to PECL converter, was a necessary component to convert the TTL signal to a PECL signal. The output of the converter was then input into the multiplexer. From there, the user can choose which frequency he or she wishes to measure the channel.

**Table 1. Multiplexer Logic and Frequency Range of the Variable Frequency Signal Clock Generator**
Functions of the Output	Select 1	Select 0	Low Frequency	High Frequency	Incremented Frequency
10 MHz Rubidium Signal	0	0	10 MHz	10 MHz	N/A
Output of the MC12430 Divided by 4	0	1	12.5 MHz	125 MHz	12.5 MHz
No Output Signal	1	0	N/A	N/A	N/A
Output of the MC12430	1	1	50 MHz	500 MHz	50 MHz

Since PECL logic was necessary, a 3 volt power supply was designed to supply the 50 ohm to 3 volt transmission line termination. First, a voltage divider circuit was set up using two 1.5 kohm resistors. A 2.5 volt DC signal was then input into the non-inverting terminal of a TL082 Texas Instruments operational amplifier. The output of the operational amplifier was fed into the base of a 2N2907 pnp transistor. The collector of the transistor was connected to ground while the emitter was connected to the inverting input of the operational amplifier and the rest of the circuit. Capacitors of 33, 0.1, and 0.01 µF were implemented after the transistor to allow a path to ground for the AC current, reducing noise on the power supply. Finally, a 50 ohm resistor was used to terminate the circuit.

Since power supply noise is so common in RF design, all of the power pins in the system were filtered. In the MC12430 data sheets, a power supply filter design was given, which was very helpful considering it was the most vital component of the system. A current limiting resistor was used for the phase-locked loop power supply along with two capacitors that acted as a short circuit to ground for AC current. A regular 0.01 µF capacitor reduced the noise on the chip's power pin. The rest of the chips on the board also have a 0.01 µF capacitor on them to reduce external noise. After the frequency converter was fabricated, undesired external noise was found on each of the PECL terminations to a positive 3 volts. Therefore, 1 and 0.1 µF capacitors were used in these situations to reduce noise even further. In the second fabrication of this system, adjusts will be made to produce a circuit board which is noise free.

The material of the circuit board was the first design requirement necessary. After using Rogers RO4003 microwave material for the test board, I decided a thicker substrate was necessary for the frequency converter. The test board was very thin and even broke through in some locations. The dielectric constant of the TMM-10 material was much higher but did not factor into the decision since extremely high frequencies were not necessary. The traces on the circuit board were then calculated to be 19.4 mils, which was a suitable size. Therefore, the TMM-10 material was chosen for the final design. Since the circuit board was only two layers, the bottom layer was chosen as a ground plane while the top layer contained two larger copper pads for the 5 and 3 volt power supplies. The placement of chips began from right to left on the board. The MC12430 was placed on the far right with 11 pads, corresponding to the 11 inputs that control the output frequency. Wires from the rotary switch were connected to these pads. Since the MC12430 contained pull-up resistors, the pole of the rotary switch was connected to ground. Therefore, only inputs that needed to be grounded were soldered to the rotary switch. Three pads were used for the toggle switch of the MC12430. When the switch is low, the input data was latched into the chip. The output was enabled when the toggle switch was high. The output of the MC12430 was followed by the differential receiver and the other chips listed in the design above. All of the PECL chips were terminated using a 51.1 ohm surface mount resistor connected to a positive 3 volts. Since the 3 volt traces could not cross the other traces on the top layer, vias were used to run traces on the bottom layer. Since these were only DC traces, the ground plane would not be greatly affected by noise. On the output, pads were used to select the output of the multiplexer. Again, wires ran from the pads to the rotary switch, except the pole was tied to 5 volts since the multiplexer contained pull-down resistors. SMA connectors were used for the input of the rubidium signal and the final output. A picture of the circuit board will be available as soon as I have finalized the design. As discussed above, there are still some additional components that are necessary to resolve the noise issues.