Convert your CB to 10 Metres

Convert your Cybernet to 10 metres

The circuit to be described was developed for use with the most common type of radio which uses the LC7137 frequency synthesiser LC. The original idea came from a circuit published by Hugh Alison in "The Short Wave Magazine" (which, unfortunately, could not be made to work!)

The basic concept is to feed the LC7137 with a frequency which is lower than that which the VCO is actually producing so that the LC7137 is fooled into increasing the VCO frequency. When the CB radio is receiving, the VCO runs at the input frequency minus 10.695 MHz. On transmit the VCO runs at half the output frequency. For example: channel 40 normally produces a frequency of 27.99125 MHz so to raise this to, say, 29.70 we need to subtract 1.70875 MHz during receive or subtract half this amount (0.854375) during transmit. The beauty of the method we use stems from the fact that the 10.24 MHz crystal oscillator output could be divided digitally to produce almost exactly these two down mix frequencies.

Circuit description

IC2 is a divider chip which is configured to produce a divide by 12 output on pin 12, a divide by 6 output on pin 8 and a divide by 3 output on pin 9. We need to switch between ÷6 and ÷12 so TR5 and IC5a/b were employed to perform the changeover governed by LC7137 pin 20 (TX/RX).

The original idea was to use a simple transistor mixer to combine the VCO output with the output from IC2. The difference frequency would be filtered out to be passed to ICI. This idea was abandoned in favour of the digital approach pioneered by Bill Sparks G8FBX and Colin Horrabin G3SBI. Instead of mixing and filtering we simply blank out a cycle from the VCO output each time our divider output provides a pulse: The LC7137 does not care about the waveform shape since it incorporates digital circuitry itself. The occasional missing pulse, therefore, causes no problems. Since the resultant pulse count inside the LC7137 is less than that produced by the 10.24 crystal for each given channel, the LC7137 increases the VCO frequency to compensate.

The object, then, is to remove one VCO cycle for every square wave pulse which appears from the divider LC. You might think that simply differentiating the square wave to form a pulse to drive a monostable would be a satisfactory method of generating a blanking pulse. It would be, were it not for the fact that the VCO and the output from IC3 are not (and can not be) synchronised. An additional problem is that the length of the blanking pulse needs to be varied between TX and RX because the VCO frequency changes.

The problem is solved by means of two JK flip flops in IC4. (IC3 is an option to give an extra ÷4, producing a lower freq. band). IC4a is programmed with Ja high and Ka low so that each time the clock input sees the trailing edge of a square wave, the Qa output on pin 15 goes high. This action sets Jb high. (The output Qb has been reset low by the combination R16/C11 at switch-on and is unaffected at this time by the state 96b).

The VCO waveform is amplified by TR4 and squared by IC5c then fed to the clock input Cb. When Cb sees the falling edge of a clock pulse, the state of input Kb is transferred to output Qb. Consequently, at this time, Qb goes low. IC5d is now effectively disabled so the next VCO pulse can not pass to the LC7137. Input Ra on pin 3 is held low by Qb so Qa is reset low and input Kb goes high.

When the next clock pulse trailing edge appears on Cb it transfers the state of Kb to the output Qb which goes high, enabling IC5d which can now continue to pass VCO pulses until the next square wave trailing edge appears from IC2. By this method we blank out one VCO pulse after the divider square wave goes low and after the VCO pulse goes low, thus blanking out the next VCO pulse which resets the flip flop until the next divider pulse arrives.

The circuit eliminates the need for any timing elements and is, thus, independent of the frequencies involved. The addition of IC3 provides an extra ÷2 or ÷4 which will alter the frequencies by a smaller amount, putting operation lower in the 10 metres band. Without IC3 the rig will operate from 29.31 to 29.70 MHz (link IC3 pin hole 1 to 11). With IC3 fitted and link B the rig will operate from 28.46 to 28.85 MHz. With IC3 fitted and link C the rig operates from 28.03 to 28.42 MHz. With LC7132 each band is 0.64MHz lower.

The TX/RX signal is inverted by ICSb and controls TR1 which connects a small capacitor to the 10.24 MHz oscillator in order to provide a small frequency shift (about 2kHz lower) during TX. The value of C6 will need to be altered if IC3 is fitted with link B (4p7). VCO lock is indicated by an LED controlled by TR2 (not essential).

Because of the high frequencies involved, (the circuit is unlikely to work if built on veroboard. Several versions have been built successfully on single sided copper clad PC Board but tests indicate that it would be better with a ground plane (use double sided PCB with the unused copper side soldered to 0 volt component legs). Use only the IC.s specified (74LS92, 74HC00 and 74HC76). 74AC-- versions cause interference.





		Convert your Cybernet to 10 metres Convert your Cybernet to 10 metres The circuit to be described was developed for use with the most common type of radio which uses the LC7137 frequency synthesiser LC. The original idea came from a circuit published by Hugh Alison in "The Short Wave Magazine" (which, unfortunately, could not be made to work!) The basic concept is to feed the LC7137 with a frequency which is lower than that which the VCO is actually producing so that the LC7137 is fooled into increasing the VCO frequency. When the CB radio is receiving, the VCO runs at the input frequency minus 10.695 MHz. On transmit the VCO runs at half the output frequency. For example: channel 40 normally produces a frequency of 27.99125 MHz so to raise this to, say, 29.70 we need to subtract 1.70875 MHz during receive or subtract half this amount (0.854375) during transmit. The beauty of the method we use stems from the fact that the 10.24 MHz crystal oscillator output could be divided digitally to produce almost exactly these two down mix frequencies. Circuit description IC2 is a divider chip which is configured to produce a divide by 12 output on pin 12, a divide by 6 output on pin 8 and a divide by 3 output on pin 9. We need to switch between ÷6 and ÷12 so TR5 and IC5a/b were employed to perform the changeover governed by LC7137 pin 20 (TX/RX). The original idea was to use a simple transistor mixer to combine the VCO output with the output from IC2. The difference frequency would be filtered out to be passed to ICI. This idea was abandoned in favour of the digital approach pioneered by Bill Sparks G8FBX and Colin Horrabin G3SBI. Instead of mixing and filtering we simply blank out a cycle from the VCO output each time our divider output provides a pulse: The LC7137 does not care about the waveform shape since it incorporates digital circuitry itself. The occasional missing pulse, therefore, causes no problems. Since the resultant pulse count inside the LC7137 is less than that produced by the 10.24 crystal for each given channel, the LC7137 increases the VCO frequency to compensate. The object, then, is to remove one VCO cycle for every square wave pulse which appears from the divider LC. You might think that simply differentiating the square wave to form a pulse to drive a monostable would be a satisfactory method of generating a blanking pulse. It would be, were it not for the fact that the VCO and the output from IC3 are not (and can not be) synchronised. An additional problem is that the length of the blanking pulse needs to be varied between TX and RX because the VCO frequency changes. The problem is solved by means of two JK flip flops in IC4. (IC3 is an option to give an extra ÷4, producing a lower freq. band). IC4a is programmed with Ja high and Ka low so that each time the clock input sees the trailing edge of a square wave, the Qa output on pin 15 goes high. This action sets Jb high. (The output Qb has been reset low by the combination R16/C11 at switch-on and is unaffected at this time by the state 96b). The VCO waveform is amplified by TR4 and squared by IC5c then fed to the clock input Cb. When Cb sees the falling edge of a clock pulse, the state of input Kb is transferred to output Qb. Consequently, at this time, Qb goes low. IC5d is now effectively disabled so the next VCO pulse can not pass to the LC7137. Input Ra on pin 3 is held low by Qb so Qa is reset low and input Kb goes high. When the next clock pulse trailing edge appears on Cb it transfers the state of Kb to the output Qb which goes high, enabling IC5d which can now continue to pass VCO pulses until the next square wave trailing edge appears from IC2. By this method we blank out one VCO pulse after the divider square wave goes low and after the VCO pulse goes low, thus blanking out the next VCO pulse which resets the flip flop until the next divider pulse arrives. The circuit eliminates the need for any timing elements and is, thus, independent of the frequencies involved. The addition of IC3 provides an extra ÷2 or ÷4 which will alter the frequencies by a smaller amount, putting operation lower in the 10 metres band. Without IC3 the rig will operate from 29.31 to 29.70 MHz (link IC3 pin hole 1 to 11). With IC3 fitted and link B the rig will operate from 28.46 to 28.85 MHz. With IC3 fitted and link C the rig operates from 28.03 to 28.42 MHz. With LC7132 each band is 0.64MHz lower. The TX/RX signal is inverted by ICSb and controls TR1 which connects a small capacitor to the 10.24 MHz oscillator in order to provide a small frequency shift (about 2kHz lower) during TX. The value of C6 will need to be altered if IC3 is fitted with link B (4p7). VCO lock is indicated by an LED controlled by TR2 (not essential). Because of the high frequencies involved, (the circuit is unlikely to work if built on veroboard. Several versions have been built successfully on single sided copper clad PC Board but tests indicate that it would be better with a ground plane (use double sided PCB with the unused copper side soldered to 0 volt component legs). Use only the IC.s specified (74LS92, 74HC00 and 74HC76). 74AC-- versions cause interference.