;LZ4GV	01-2005
;Ver. 18

	list		p=16F88		; list directive to define processor
	#include	<p16F88.inc>	; processor specific variable definitions

;Program Configuration Register 1
	__CONFIG    _CONFIG1, _INTRC_IO & _CP_OFF & _CPD_OFF & _BODEN_ON & _CCP1_RB3 & _MCLR_OFF & _DEBUG_OFF & _WRT_PROTECT_OFF & _LVP_OFF & _PWRTE_ON & _WDT_OFF
;		              _LP_OSC     _CP_ALL   _CPD_ON    _BODEN_OFF  _CCP1_RB0   _MCLR_ON    _DEBUG_ON    _WRT_PROTECT_256   _LVP_ON    _PWRTE_OFF  _WDT_ON
;		              _XT_OSC                                                                           _WRT_PROTECT_2048
;		              _HS_OSC										_WRT_PROTECT_ALL
;			      _INTRC_CLKOUT
;			      _EXTRC_IO
;			      _EXTRC_CLKOUT
;			      _EXTCLK
;Program Configuration Register 2
	__CONFIG    _CONFIG2, _IESO_OFF & _FCMEN_OFF
;		              _IESO_ON    _FCMEN_ON


OSCTUNE_MNL	EQU	.0	;Central frequency	min .32 - .63  0  .1 - .31 max

#define	RA0		PORTA,0
#define	RA1		PORTA,1
#define	RA2		PORTA,2
#define	RA3		PORTA,3
#define	RA4		PORTA,4
#define	RA5		PORTA,5
#define	RA6		PORTA,6
#define	RA7		PORTA,7

#define	RB0		PORTB,0
#define	RB1		PORTB,1
#define	RB2		PORTB,2
#define	RB3		PORTB,3
#define	RB4		PORTB,4
#define	RB5		PORTB,5
#define	RB6		PORTB,6
#define	RB7		PORTB,7
#define	RB7_IO		TRISB,7

#define	WPAGE		PCLATH,3	;0- Work. Page0		1- Work. Page1
#define	FSRBANK		STATUS,IRP	;0- Bank1,2		1- Bank2,3	Има значение само за FSR.

				;0x20 to 0x6F	Bank 0
#define	STATBIT		0x20,0	;


FSRMEM		EQU	0x6A	;
PCLMEM		EQU	0x6B	;
ACQT		EQU	0x6C	;
TMR0MEM		EQU	0x6D	;
TMR1LMEM	EQU	0x6E	;
TMR1HMEM	EQU	0x6F	;

				;0x70 to 0x7F	Bank 0,1,2,3
INTCONMEM	EQU	0x7A	;Bank 0,1,2,3
REEADR		EQU	0x7B	;Bank 0,1
REEDATA		EQU	0x7C	;Bank 0,1
W_TEMP		EQU	0x7D	;Bank 0,1
STATUS_TEMP	EQU	0x7E	;Bank 0,1
PCLATH_TEMP	EQU	0x7F	;Bank 0,1

				;0xA0 to 0xBF	Bank 1
OPTIONMEM	EQU	0xA0	;


	ORG	0x2100		;Initialize EEPROM locations
	DE	0x00,0x01,0x02,0x03

	ORG	0x0000
	GOTO	START

	ORG	0x0004		;Interrupt vector location
	MOVWF   W_TEMP		;Запомня последното състояние на текущите регистри (W register).
	MOVF	STATUS,W	;Move STATUS register into W register
	MOVWF	STATUS_TEMP	;Save off contents of STATUS register
	MOVF	PCLATH,W	;Move PCLATH register into W register
	MOVWF	PCLATH_TEMP	;Save off contents of PCLATH register

	BCF	STATUS,RP1	;Bank0
	BCF	STATUS,RP0	;
	;;;
	;;;
	GOTO	END_INTERRUPT	;-->

END_INTERRUPT			;Възтановява състоянието на текущите регистри.
	MOVF    PCLATH_TEMP,W	;Retrieve copy of PCLATH register
	MOVWF	PCLATH		;Restore pre-isr PCLATH register contents
	MOVF    STATUS_TEMP,W	;Retrieve copy of STATUS register
	MOVWF	STATUS		;Restore pre-isr STATUS register contents
	SWAPF   W_TEMP,F	;Restore pre-isr W register contents
	SWAPF   W_TEMP,W	;-//-
	RETFIE			;Return From Interrupt / Enable Global Interrupts


BEGIN
	MOVLW	0x20		;Start Address RAM.
	MOVWF	FSR		;
CLR_RAM				;
	CLRF	INDF		;
	MOVLW	0x7F		;End Address RAM.
	SUBWF	FSR,W		;
	INCF	FSR,F		;
	BTFSS	STATUS,C	;FSR = or > W	C=1
	GOTO	CLR_RAM		;FSR < W	C=0

;**********  Начало  ***********
MAIN
	MOVLW	.4		; x 1/(Fosc/4/128) =
	MOVWF	TMR0MEM		;
	COMF	TMR0MEM,W	;
	MOVWF	TMR0		;
	BCF	INTCON,TMR0IF	;Overflow TMR0


	CLRF	TMR1L		;
	MOVLW	.250		;
	MOVWF	TMR1HMEM	;
	COMF	TMR1HMEM,W	;
	MOVWF	TMR1H		;
	BCF	PIR1,TMR1IF	;Overflow TMR1


	MOVLW	.0		;Pulse Width Modulation
	MOVWF	CCPR1L		;Bit 9 - 2
	BCF	CCP1CON,CCP1X	;Bit 1
	BCF	CCP1CON,CCP1Y	;Bit 0


;	CALL	READC_RA0	;Out:F(ADRESH)
;	MOVLW	.100		;
;	SUBWF	ADRESH,W	;ADRESH > W	C=1
;	BTFSC	STATUS,C	;ADRESH = W	C=1
;	GOTO			;ADRESH < W	C=0
;	GOTO			;

	GOTO	MAIN
;**********  Край  *************

	MOVLW	'$'
	CALL	UAT
;**********************************************************************
UAT				;Universal Asynchronous Transmiter	In: W
	BTFSS	PIR1,TXIF
	GOTO	$-1
	MOVWF	TXREG
	BTFSS	PIR1,TXIF
	GOTO	$-1
	;XORWF	CHSUM,F		;Пресмята контролната сума на изпратените данни.
	RETURN
;**********************************************************************

;**********************************************************************
WRITE				;In:F(REEADR,REEDATA)
	BSF	STATUS,RP1	;
	BCF	STATUS,RP0	;Bank2
	MOVF	REEADR,W	;
	MOVWF	EEADR

	MOVF	REEDATA,W
	MOVWF	EEDATA

	BSF	STATUS,RP1	;
	BSF	STATUS,RP0	;Bank3

	BCF	EECON1,EEPGD	;0 - Accesses data memory EEPROM

	BCF	INTCONMEM,GIE	;
	BTFSC	INTCON,GIE	;
	BSF	INTCONMEM,GIE	;
	BCF	INTCON,GIE	;

	BSF	EECON1,WREN	;1 - Allows write cycles
	MOVLW	0x55		;
	MOVWF	EECON2		;
	MOVLW	0xAA		;
	MOVWF	EECON2		;
	BSF	EECON1,WR	;1 - initiates a write cycles
WRITE_CH			;
	BTFSC	EECON1,WR       ;0 - Write cycles to the EEPROM is complete
	GOTO	WRITE_CH	;-^
	
	BTFSC	INTCONMEM,GIE	;
	BSF	INTCON,GIE	;

	BCF	EECON1,WREN	;disable write
	BCF	STATUS,RP1	;
	BCF	STATUS,RP0	;Bank0
	RETURN
;

READE				;In:F(REEADR)
	BSF	STATUS,RP1	;
	BCF	STATUS,RP0	;Bank2
	MOVF	REEADR,W	;Out:F(REEDATA),W
	MOVWF	EEADR

	BSF	STATUS,RP1	;
	BSF	STATUS,RP0	;Bank3

	BCF	EECON1,EEPGD	;0 - Accesses data memory EEPROM

	BSF	EECON1,RD	;1 - initiates an EEPOM read
READE_CH
	BTFSC	EECON1,RD	;rd done?
	GOTO	READE_CH	;no then loop

	BSF	STATUS,RP1	;
	BCF	STATUS,RP0	;Bank2
	MOVF	EEDATA,W
	MOVWF	REEDATA

	BCF	STATUS,RP1	;
	BCF	STATUS,RP0	;Bank0

	RETURN			;
;

READC_RA0			;Analog-to-Digital Converter	Out: F(ADRESH)
	BCF	ADCON0,CHS2	;Select A/D Input Chennel: RA0
	BCF	ADCON0,CHS1	;
	BCF	ADCON0,CHS0	;
	GOTO	READC		;

READC_RA1			;Out: F(ADRESH)
	BCF	ADCON0,CHS2	;Select A/D Input Chennel: RA1
	BCF	ADCON0,CHS1	;
	BSF	ADCON0,CHS0	;
	GOTO	READC		;

READC_RA2			;Out: F(ADRESH)
	BCF	ADCON0,CHS2	;Select A/D Input Chennel: RA2
	BSF	ADCON0,CHS1	;
	BCF	ADCON0,CHS0	;
	GOTO	READC		;

READC_RA3			;Out: F(ADRESH)
	BCF	ADCON0,CHS2	;Select A/D Input Chennel: RA3
	BSF	ADCON0,CHS1	;
	BSF	ADCON0,CHS0	;
	GOTO	READC		;

READC_RA4			;Out: F(ADRESH)
	BSF	ADCON0,CHS2	;Select A/D Input Chennel: RA4
	BCF	ADCON0,CHS1	;
	BCF	ADCON0,CHS0	;
	GOTO	READC		;

READC
	BSF	ADCON0,ADON	;1 = A/D converter module is operating
	MOVLW	.10		;.10 Fosc=4MHz	.20 Fosc=8MHz
	MOVWF	ACQT		;Acquisition Time 20uS.
	DECFSZ	ACQT,F		;-
	GOTO	$-1		;-^

	BSF	ADCON0,GO	;Start Convertion
READC_CH			;
	BTFSC	ADCON0,GO	;
	GOTO	READC_CH	;-^
	BCF	ADCON0,ADON	;0 = A/D converter is shut_off
	RETURN			;
;

SET_ADC
	BSF	STATUS,RP0	;Bank1
	MOVWF	ANSEL		;Analog Select Register
	BCF	ADCON1,VCFG1	;A/D Voltage Reference Configuration
	BCF	ADCON1,VCFG0	;
	BCF	ADCON1,ADFM	;X X X X X X X X / x x
	BSF	ADCON1,ADCS2	;Select A/D Conversion Clock 16xTosc = 4uS at 4MHz!!!
	BCF	STATUS,RP0	;Bank0
	BCF	ADCON0,ADCS1	;Select A/D Conversion Clock
	BSF	ADCON0,ADCS0	;-//-
	RETURN
;

SET_OSC				;Oscillator configuration.
	BSF	STATUS,RP0	;Bank1
	MOVWF	OSCCON		;
	BCF	OSCCON,SCS1	;0 - Oscillator Mode Defined By h'2007'
	BCF	OSCCON,SCS0	;0
	MOVLW	OSCTUNE_MNL	;Central frequency
	MOVWF	OSCTUNE		;
	BCF	STATUS,RP0	;Bank0
	RETURN			;
;

SET_TMR0
	BSF	STATUS,RP0	;Bank1
	BCF	OPTION_REG,T0CS	;0 - Intrnal Clock Source
	BTFSC	OPTION_REG,T0CS	;
	BCF	OPTION_REG,T0SE	;0 - Rising Transition RA4

	BCF	OPTION_REG,PSA	;0 - Prescaler Is Assigned To The TMR0 Module
	BTFSC	OPTION_REG,PSA	;
	GOTO	SET_TMR0_1	;-->

	MOVF	OPTION_REG,W	;
	ANDLW	B'11111000'	;Нулира само PS2 PS1 PS0
	;IORLW	B'00000000'	;Fosc/4/2	4MHz =>   2uS
	;IORLW	B'00000001'	;Fosc/4/4
	;IORLW	B'00000010'	;Fosc/4/8
	;IORLW	B'00000011'	;Fosc/4/16
	;IORLW	B'00000100'	;Fosc/4/32
	;IORLW	B'00000101'	;Fosc/4/64
	;IORLW	B'00000110'	;Fosc/4/128
	IORLW	B'00000111'	;Fosc/4/256	4MHz => 256uS
	MOVWF	OPTION_REG	;

SET_TMR0_1
	BCF	STATUS,RP0		;Bank0
	RETURN
;

SET_TMR1			;Timer1 Module:	Max period 8uS * 65536 = 524,288mS
	BCF	T1CON,T1RUN	;1 - System clock is derived from Timer1 oscillator
	BSF	T1CON,T1CKPS1	;Timer prescaler /1 - 0   /2 - 0   /4 - 1   /8 - 1
	BSF	T1CON,T1CKPS0	;Timer prescaler      0        1        0        1
	BCF	T1CON,T1OSCEN	;Oscillator is shut off.
	BSF	T1CON,NOT_T1SYNC ;1 - Do not synchronize external clock input
	BCF	T1CON,TMR1CS	;Internal Clock Fosc/4	4MHz = 8uS
	BSF	T1CON,TMR1ON	;Timer1 On bit.
	RETURN
;

SET_PWM				;Reset Pulse Width Modulation
	BSF	STATUS,RP0	;Bank1
	BCF	TRISB,3		;RB3 Output!
	MOVLW	0xFF		;
	MOVWF	PR2		;Period register.
	BCF	STATUS,RP0	;Bank0

	CLRF	CCPR1L		;Bit 9 - 2
	BCF	CCP1CON,CCP1X	;Bit 1
	BCF	CCP1CON,CCP1Y	;Bit 0

	BCF	T2CON,T2CKPS1	;Timer prescaler 1 - 0   4 - 0   16 - 1
	BCF	T2CON,T2CKPS0	;Timer prescaler     0       1        X

	BSF	T2CON,TMR2ON	;Timer2 is ON.

	MOVLW	B'00001100'	;PWM mode.
	MOVWF	CCP1CON		;
	RETURN
;

SET_CVREF
	MOVLW	B'00000000'

	BSF	STATUS,RP0	;Bank1
	MOVWF	CVRCON		;
	BSF	CVRCON,CVRR	;Range
	BSF	CVRCON,CVROE	;Output Enable Bit.
	BSF	CVRCON,CVREN	;Module Enable Bit.
	BCF	STATUS,RP0	;Bank0
	RETURN
;

SET_COMPM
	BSF	STATUS,RP0	;Bank1
	MOVLW	B'00000111'	;I/O Operating Modes.
	MOVWF	CMCON		;
	BCF	CMCON,CIS	;Input Switch Bit.
				;
	BCF	STATUS,RP0	;Bank0
	RETURN			;
;

SET_UART
	BANKSEL	SPBRG
	MOVWF	SPBRG

	BANKSEL	TRISB
	BCF	TRISB,5		;Serial Output
	BSF	TRISB,2		;Serial Input

	BANKSEL	RCSTA		;Receive Status & Control Register
	BSF	RCSTA,SPEN	;1-> Serial Port Enabbled
	BCF	RCSTA,RX9	;0-> 8bit RX	1-> 9bit RX
	;BCF	RCSTA,SREN	;
	BCF	RCSTA,CREN	;		1-> Enables Continuous Receive !!!
	BCF	RCSTA,ADDEN	;Address Detect Enable bit
	;BCF	RCSTA,FERR	;0-> No Framing Error
	;BCF	RCSTA,OERR	;0-> No Overrun Error
	;BCF	RCSTA,RX9D	;9th bit of Receive Data

	BANKSEL	TXSTA		;Trasnit Status & Control Register
	;BCF	TXSTA,CSRC	;
	BCF	TXSTA,TX9	;0-> 8bit TX	1-> 9bit TX
	BSF	TXSTA,TXEN	;0-> Disable	1-> Enable TX
	BCF	TXSTA,SYNC	;0-> Asynchron	1-> Synchronous
	BSF	TXSTA,BRGH	;0-> Low-speed	1-> High-speed
	;BCF	TXSTA,TX9D	;9bit Parity Bit

	BANKSEL	0
	RETURN
;

SET_WDT
	BSF	STATUS,RP0	;Select Bank1.
	MOVLW	B'00010110'	;1:65536
	MOVWF	WDTCON		;
	BCF	WDTCON,SWDTEN	;1 - WDT Is Turned ON (If Configuration Bit=0 disable)
	BCF	STATUS,RP0	;Select Bank0.
	RETURN
;**********************************************************************

;*******Първоначална настройка на микроконтролера**********************
START
	BCF	STATUS,RP1	;Bank0
	BCF	STATUS,RP0	;

	BCF	FSRBANK		;0- Bank1,2	1- Bank2,3	Има значение само за FSR.
	BCF	WPAGE		;0- Work. Page0		1- Work. Page1

	CLRF	PORTA
	CLRF	PORTB

	CLRF	INTCON		;Забранява всички прекъсвания.
	BSF	STATUS,RP0	;Select Bank1.
	CLRF	PIE1
	CLRF	PIE2
	BCF	STATUS,RP0	;Select Bank0.

	;MOVLW	B'01110000'	;Internal oscillator	8MHz
	MOVLW	B'01100000'	;Internal oscillator	4MHz
	;MOVLW	B'01010000'	;Internal oscillator	2MHz
	;MOVLW	B'01000000'	;Internal oscillator	1MHz
	;MOVLW	B'00110000'	;Internal oscillator	500KHz
	;MOVLW	B'00100000'	;Internal oscillator	250MHz
	;MOVLW	B'00010000'	;Internal oscillator	125MHz
	;MOVLW	B'00000000'	;Internal oscillator	31,25KHz
	CALL	SET_OSC		;Oscillator configuration!

	BSF	STATUS,RP0		;Select Bank1.
	BSF	OPTION_REG,NOT_RBPU	;1 - Pull-ups Disabled
	BSF	OPTION_REG,INTEDG	;1 - Rising RB0 Interrupt
	BCF	STATUS,RP0		;Select Bank0.

	MOVLW	B'00000000'	;0 - Digital I/O	1 - Analog Input
	CALL	SET_ADC		;ADC configuration!

	CALL	SET_TMR0	;

	CALL	SET_TMR1	;

	;CALL	SET_CVREF	;Enable Comparator Voltage Reference Module & Reset - RA2

	CALL	SET_COMPM	;

	CALL	SET_WDT

	BSF	STATUS,RP0	;Select Bank1.
	MOVLW	B'11111111'	;
	MOVWF	TRISA		;PortA
	MOVLW	B'11111111'	;
	MOVWF	TRISB		;PortB
	BCF	STATUS,RP0	;Select Bank0.

	;CALL	SET_PWM		;Enable PWM & Reset - RB3

	;MOVLW	.25		;19200 bps UART	8MHz
	;MOVLW	.12		;19200 bps	4Mhz
	;CALL	SET_UART

	GOTO	BEGIN		;--^

END