* out = A + B + C * D'

.include "nominal.jsim"

XinvD D outD inv

* Pull Up
.subckt up A B C D out
MPU1 vdd A ao vdd PENH sw=1 sl=1
MPU2 ao B bo vdd PENH sw=1 sl=1
MPU3 bo C out vdd PENH sw=1 sl=1
MPU4 bo outD out vdd PENH sw=1 sl=1
.ends

* Pull Down
.subckt down A B C D out
MPD1 out A 0 0 NENH sw=1 sl=1
MPD1 out B 0 0 NENH sw=1 sl=1
MPD1 out C outC 0 NENH sw=1 sl=1
MPD1 outC outD 0 0 NENH sw=1 sl=1
.ends

* inverter
.subckt inv in out
MPD1 out in 0 0 NENH sw=1 sl=1
MPU1 out in vdd vdd PENH sw=1 sl=1
.ends