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Lecture
Plan for COMPUTER ORGANIZATION |
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| Unit 1 |
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| Lectuer |
Topic |
Book |
Page no. |
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| 1 |
Intrduction about the
subject |
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| 2 |
Register Transter
language |
Book 1 |
93-94 |
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| 3 |
Register Transfer |
Book 1 |
95-97 |
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| 4 |
Bus & Memory
transfer |
Book 1 |
97-102 |
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| 5 |
Count.. |
Book 1 |
97-102 |
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| Tutorial #1 |
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| 7 |
Arthematic
Microoperations |
Book 1 |
102-108 |
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| 8 |
Logic Microoperations |
Book 1 |
102-113 |
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| 9 |
Logic Microoperations
count… |
Book 1 |
102-113 |
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| 10 |
Shift Microoperations |
Book 1 |
114-118 |
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| Tutorial # 2 |
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| Unit 2 |
Control Design |
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| 11 |
Microprogrammed
Control |
Book 1 |
123-127 |
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| 12 |
Computer Registers |
Book 1 |
127-132 |
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| 13 |
Computer Instructions |
Book 1 |
132-135 |
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| Tutorial # 3 |
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| 14 |
Timing & Control |
Book 1 |
135-139 |
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| 15 |
Instruction Cycle |
Book 1 |
139-144 |
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| 16 |
Memory Reference
Instructions |
Book 1 |
145-150 |
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| Tutorial # 4 |
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| 17 |
Microprogrammed
Control |
Book 1 |
213-216 |
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| 18 |
Addressing Sequencing |
Book 1 |
216-220 |
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| 19 |
Microprogram Example |
Book 1 |
220-222 |
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| 20 |
Microinstruction
Format |
Book 1 |
222-226 |
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| Tutotial # 5 |
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| 21 |
Fetch Routine |
Book 1 |
226-230 |
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| 22 |
Design of Control
Unit |
Book 1 |
231-235 |
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| Tutorial # 6 |
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| Unit 3 |
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| 23 |
General Register
Organization |
Book 1 |
241-247 |
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| 24 |
Stack Organization |
Book 1 |
247-251 |
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| 25 |
Reverse Polish
Notation |
Book 1 |
251-255 |
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| 26 |
Instruction Format |
Book 1 |
255-260 |
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| 27 |
Addressing Modes |
Book 1 |
260-266 |
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| Tutorial # 7 |
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| 28 |
Data Transfer &
Manipulation |
Book 1 |
266-270 |
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| 29 |
Shift Instruction |
Book 1 |
271-278 |
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| 30 |
Subroutine Call &
Return |
Book 1 |
278-282 |
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| 31 |
RISC & CICS |
Book 1 |
282-291 |
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| Tutorial # 8 |
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| Unit 4 |
I/O Organization |
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| 32 |
I/O Interface |
Book 1 |
385-391 |
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| 33 |
Asynchronous Data
Transfer |
Book 1 |
391-396 |
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| 34 |
Asynchronous serial
Transfer |
Book 1 |
396-402 |
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| 35 |
Modes of Transfer |
Book 1 |
402-407 |
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| 36 |
Priority Intrupt |
Book 1 |
407-415 |
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| Tutorial# 9 |
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| 37 |
Direct Memory Access |
Book 1 |
415-420 |
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| 38 |
I/O Processor |
Book 1 |
420-428 |
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| 39 |
Serial Communication |
Book 1 |
429-432 |
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| 40 |
Transmission Example |
Book 1 |
433-439 |
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| Tutorial # 10 |
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| Unit 5 |
Memory Organization |
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| 41 |
Memory Hierarchy,
Ram, Rom |
Book 1 |
445-452 |
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| 42 |
Auxiliary Memory |
Book 1 |
452-456 |
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| 43 |
Associative Memory |
Book 1 |
456-462 |
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| 44 |
Cache Memory |
Book 1 |
462-469 |
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| 45 |
Virtual Memory |
Book 1 |
469-474 |
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| 46 |
Page Replacement
Policy |
Book 1 |
475-476 |
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| 47 |
Memory management
Hardware |
Book 1 |
476-483 |
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| Tutorial # 11 |
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| Unit 6 |
Computer Arithematics |
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| 48 |
Addition Algorithem |
Book 1 |
334-338 |
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| 49 |
signed 2's compliment
data |
Book 1 |
338-340 |
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| 50 |
Multiplication
Algorithms |
Book 1 |
340-346 |
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| 51 |
Array Multiplication |
Book 1 |
346-348 |
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| 52 |
IEEE Floating Point
Operations |
Book 1 |
354-357 |
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| 53 |
Register Configration |
Book 1 |
357-363 |
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| Tutorial # 12 |
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| Book 1: |
Computer System Architecture, By
M.Morris Mano, PHI third edition |
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