JAMES BUCKNER, PhD

SEMICONDUCTOR PROCESS ENGINEER

PROFESSIONAL EXPERIENCE

• Developed and maintained photolithography BEOL processes to print contact holes and metal lines for Qimonda’s leading high-volume DRAM production technologies in a 300-mm fab.
• Supported the identification of a 20% yield loss involving interactions in the process integration, and implemented the solution.
• Identified an integration issue causing scrap for alignment rejects and implemented the solution.
• Supported the identification, containment, and circumvention of a resist poisoning issue, leading to 2% yield improvement.
• Supported numerous BEOL integration changes by determining the impact on overlay.
• Drove improvements in overlay Cpk by identifying a line-capture issue in metrology, a matching issue between scanners, and notch-orientation dependence on biases.
• Reduced scrap by redistributing alignment marks to avoid underlying marks that interfered.
• Improved yield by supporting a robust resist dispense recipe.

• Developed photolithography processes to print contact and via holes for TI’s leading-edge technologies, and transferred to other TI fabs.
• Improved and maintained contact and via photolithography processes over multiple technology nodes down to CD’s of 120 nm.
• Boosted productivity of contact/via pattern processes by reducing reworks from 15% to 1%, eliminating test wafers, eliminating dummy shots, reducing CD sampling from four wafers to one per lot, reducing alignment sampling from 24 wafers to one per lot, and eliminating a pre-pattern surface treatment. Further reduced CD sampling to once every four lots.
• Solved a persistent resist cracking problem by introducing a proprietary process. Received a Manufacturing Incentive Award for it.
• Reduced pattern loss from backside particles by 90% by identifying the source at a prior process step and introducing a backside scrub.
• Improved yield by solving a persistent problem with gross missing pattern by implementing by-tool focus offset standards.
• Improved yield by implementing by-shot exposure at contact/via levels and invented a control system to ensure correct CD’s in each zone.
• Improved yield by driving contact and via SSA optimizations on multiple technologies at TI for yield improvement.
• Improved yield by optimizing illumination conditions for side lobe control.
• Characterized focus drilling to improve depth of focus.
• Managed 10 process engineering technicians.
• Created training materials for Spotfire data visualization software and trained engineers to use it.

• Avoided $150M of new capital expenditures by creating, implementing, and developing the Equipment Migration Program.
• Managed the development of a top-down wafer fab cost model under contract with VLSI Research.
• Developed the decision theory used by TI to select the equipment purchased for worldwide deployment.
• Developed statistical models and methods to support Equipment Evaluation Programs and Equipment Improvement Programs.
• Provided technical consultation to Raytheon for methodology to evaluate Ozone Depleting Substance (ODS) abatement tools for the semiconductor industry.
• Served on a SEMATECH PTAB (project technical advisory board) to create a relative risk model for environmental, safety, and health issues related to the semiconductor industry.

• Developed CVD tungsten deposition tools from beta test to full-up manufacturing worthiness.
• Discovered new sources of particulates in a CVD tungsten tool by designing experiments to amplify deposition of particles on test wafers.
• Discovered an instrument warm-up effect source of variability in film metrology at a supplier site. (Published as a book chapter)
• Designed a novel gauge study for a Prometrix RS35e metrology tool. (Published as a book chapter)
• Discovered and accounted for directionality in the uniformity response used to evaluate the CVD tungsten deposition process, resulting in the first successful model of uniformity response for this process. (Published as a book chapter; presented as an invited talk)
• Solved catastrophic peeling of the titanium nitride underlayer caused by the CVD tungsten deposition process.
• Received awards for best technology transfer and best equipment improvement project.

• Implemented the first CVD tungsten deposition into manufacturing in TI.
• Developed and sustained metal sputtering processes.
• Created and implemented a feedback loop to control sputtering processes, reducing process variability by 50%.

EDUCATION AND ADDITIONAL TRAINING

• Project Management
• Leadership Development
• Theory of Constraints (Goldratt Institute)
• Design of Experiments
• Taguchi Experimental Design
• Total Preventive Maintenance

• Characterized the physical and electrical damage induced in silicon surfaces exposed to low-energy ion bombardment.
• Demonstrated that depth of damage in silicon and thickness of overlying oxide are measurable simultaneously using ellipsometry.
• Demonstrated that annealing restores optical and electrical properties of silicon damaged by heavy ions but not by light ions.
• Developed theory and wrote software to analyze damaged silicon surfaces using ellipsometry.

• Explained the effect of cross-sectional geometry on the wetting forces experienced by a polymer fiber.
• Developed a fast method to measure co-polymerization using Fourier nuclear magnetic resonance.