This course started with the basic concepts
of modern day processors like advanced pipelining,
then went into to the depth of pipelining as to how
to remove the data and control hazards in the pipeline.
Scoreboarding and tomasulo algorithm for dynamic
scheduling and their implementation using verilog/HDL.
Static scheduling for scalar and super-scalar processors.
Different branch prediction logic including tournament
predictors. Reconfigurable computing and dataflow computing.
Case studies of SUN SPARC, P6 microarchitecture,
Pentium 4 arhictecture and Iatnium architectures.
Study of VLIW approach and global schedluing techniques
used in modern day processors.
Study and implementation of different cache behaviour
and technquies to optimize them, main memory organization
techniques. Study of parallel computers, multiprocessors
machines and cache cohenrency in SMP machines. Study of
MESI protocol used by INTEL. RAID and SAN
organizations.
Presented term paper on "Correlation prefetching
using user level memory thread" from
IEEE Journal of parallel and distibuted systems,
July, 2003 Issue.
The assignments including the source code can be found
here
