  ENTITY alu is 
  port(a,b              : in bit_vector(3 downto 0);
        s0,s1,s2        :in bit;
        cin             : in bit ;
        ck              : in BIT;  
        reset              : in BIT;  
        f               : out bit_vector(3 downto 0);
        vdd, vss        : in BIT
       );
        
 end alu;


architecture alu2 of alu is
signal k  :bit_vector(3 downto 0);
signal tempk  :bit_vector(3 downto 0);
signal mux : bit_vector(3 downto 0);
signal t,q:bit_vector( 3 downto 0);
signal p0,p1,p3,p5:bit_vector(3 downto 0);
signal c0,c1,c3,c5:bit_vector(3 downto 0);
signal reg     : REG_VECTOR(3 downto 0)REGISTER;
begin

ASSERT(vdd = '1' and vss = '0')
    REPORT"wrong power supplies"
    SEVERITY WARNING;
--ASSERT(vdde = '1' and vsse = '0')
  --    REPORT "wrong power external supplies"
    --  SEVERITY WARNING;

mux <= (s2 & s1 & s0 & cin);

t<="0000";
p0(0)<= a(0) xor t(0) xor cin;
c0(0)<= (a(0) and t(0)) or (( a(0) or t(0)) and cin);
p0(1)<= a(1) xor t(1) xor c0(0);
c0(1)<= (a(1) and t(1)) or (( a(1) or t(1)) and c0(0));
p0(2)<= a(2) xor t(2) xor  c0(1);
c0(2)<= (a(2) and t(2)) or (( a(2) or t(2)) and c0(1));
p0(3)<= a(3) xor t(3) xor  c0(2);
c0(3)<= (a(3) and t(3)) or (( a(3) or t(3)) and c0(2));



p1(0)<= a(0) xor b(0) xor cin;
c1(0)<= (a(0) and b(0)) or (( a(0) or b(0)) and cin);
p1(1)<= a(1) xor b(1) xor c1(0);
c1(1)<= (a(1) and b(1)) or (( a(1) or b(1)) and c1(0));
p1(2)<= a(2) xor b(2) xor  c1(1);
c1(2)<= (a(2) and b(2)) or (( a(2) or b(2)) and c1(1));
p1(3)<= a(3) xor b(3) xor c1(2);
c1(3)<= (a(3) and b(3)) or (( a(3) or b(3)) and c1(2));



p3(0)<= a(0) xor (not b(0)) xor cin;
c3(0)<= (a(0) and(not b(0))) or (( a(0) or(not  b(0))) and cin);
p3(1)<= a(1) xor ( not b(1)) xor c3(0);
c3(1)<= (a(1) and( not  b(1))) or (( a(1) or (not b(1))) and c3(0));
p3(2)<= a(2) xor( not  b(2)) xor  c3(1);
c3(2)<= (a(2) and ( not b(2))) or (( a(2) or( not  b(2))) and c3(1));
p3(3)<= a(3) xor(not  b(3)) xor  c3(2);
c3(3)<= (a(3) and ( not b(3))) or (( a(3) or ( not b(3))) and c3(2));



q<="1111";
p5(0)<= a(0) xor q(0) xor cin;
c5(0)<= (a(0) and q(0)) or (( a(0) or q(0)) and cin);
p5(1)<= a(1) xor q(1) xor c5(0);
c5(1)<= (a(1) and q(1)) or (( a(1) or q(1)) and c5(0));
p5(2)<= a(2) xor q(2) xor  c5(1);
c5(2)<= (a(2) and q(2)) or (( a(2) or q(2)) and c5(1));
p5(3)<= a(3) xor q(3) xor c5(2);
c5(3)<= (a(3) and b(3)) or (( a(3) or q(3)) and c5(2));


with mux select

 tempk <= a    WHEN "0000",
      p0   WHEN "0001",
      P1   WHEN "0010",
      p1   WHEN  "0011",
      p3   WHEN "0100",
      p3   WHEN "0101",
      p5   WHEN "0110",
      a    WHEN "0111",
      (a or b) WHEN "1000",
      (a or b) WHEN "1001",
      ( a xor b)WHEN "1010",
      (a xor b) WHEN "1011",
      (a and b) WHEN "1100",
      (a and b) WHEN "1101",
      ( not a) WHEN "1110",
      ( not a) WHEN "1111";

   --f <= k;


with reset SELECT 
  k (3 downto 0) <= tempk(3 downto 0)    WHEN "1",
                       	 "0000"        WHEN "0" ;


  L0 : BLOCK (ck = '0' and not ck'STABLE)
     BEGIN
        reg<= GUARDED k;
   END BLOCK; 
    
  f <=  reg;


end alu2;        
   

