module xor1(c,a,b,clock);

// variable declarations..
input a,b,clock;
output c;
reg c;

// body of the program...
always @ (a or b or clock)
begin
	case(a)
		1'b1:
		begin
		if(b==1'b1)
			c=1'b0;
		 else 
			c=1'b1;
		end
		1'b0:
		begin
		if(b==1'b1)
			c=1'b1;
		else
			c=1'b0;
		end
	endcase
end
endmodule
 
