	/***   16 X 4 RAM MODEL ***/

module ram1(addr,datain,csn,rwn,dataout);
input [3:0] addr,datain;
input csn,rwn;
output [3:0] dataout;
reg [3:0] dataout;
reg [3:0] mem[15:0];

	/*** csn=0 Memory in use  ***/
/*** rwn=1 Read Memory : rwn=0 Write Memory ***/

always @ (addr or datain or csn or rwn)
begin
   if(csn==0)		//Memory in use
	begin
  	  if(rwn==1)	//Read Memory
    	    begin
     	    dataout=mem[addr];
    	    end
  	  else		//Write Memory
    	    begin
    	    mem[addr]=datain;
    	    dataout=4'bzzzz;
    	    end
         end
    else		//Dataout not in Use and set to zzzz 
         begin
            dataout=4'bzzzz;
	 end
end
endmodule

