EE 179 VHDL 2/5/2004    VHDL LECTURE NOTES  LEC#1

 

Facts

q       Information era

q       Digital –dominate technology for information processing

q       Digital hardware (HW)-is the platform for supporting digital technology

 

Digital HW -------- > CPU(>Processor)

                  -------- >Dedicated – can run software on it.

 

Why digital?

q       Robustness, accuracy

q       The nut shell graph

 

 

 

 

 

 

 


q       Different difficulties/complexities for analogy and digital HW

o       Analog-is more of an art

o       Digital-is measured by size

 

q       The driving forces for digital HW.

o       Demand (application, market)

o       Technology (semiconductors, Moore’s Law)

o       EDA tools electronic design automation

 

 

 

 

 

 

 


q       Current main technologies for digital HW

o       Masked (ex. ASIC-application specific integrated circuit)

o       Non-masked (ex. FPGA, CPLDs)

§         (L) is known as programmable devices

o       Std. Parts (Pentium, DSP, Decoder, mux)

 


NRE – no recurring engineering –initial cost

 
        FPGA

                        

                                     NRE                                                         ASIC

               

 

 

 

                                                                                                            Volume

                                                                           Break

                                                                           Even

q       A large view of digital HW

ARCHITECTURE

 
 

 

 

Sub System

 

Gate/ =>chips

 

Module

 

Gate

 

Front end

 

Back End

 

Transistor or

CKT

 

Layout

 
 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 


q       Design methodologies in dealing with complexity

o       Hierarchical approach

o       Reuse based approach

o       IP-based – intellectual property also called core or maga-cell

 

 

 

 

 

 

 

 

 

 

q       Contemporary digital HW design flow

Design Entry

 

Prototyping

 
 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 


q       HDL(VHDL, verilog, etc) tasks

o       For better documentation

o       Description-> design, modeling

o       Verification -> simulation

o       Synthesizer – doesn’t belong to HDL but it’s almost

§         Generate net list

§         Optimizing design

 

Related EDA Tools

 

q       HDL-Compiler or interpreter

o       Vendors

§         Synopses (VHDL, Verilog)

§         Model Tech (VHDL, Verilog)

§         Model Sim

§         Cadence (verilog only)

§         NC Verilog XL

q       Synthesis Tool

o       Synosy (ASIC)

o       Synplicity (FGPA)

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