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12th Week Exam
Problem 1:
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Consider a computer with 62 registers and 32 bit fixed length instruction format.
The first six bits are used for opcode where direct and indirect addressing are allowed for memory addressing only.
The mode bit is included in the opcode.
- Find the instruction format, addressing space, and number of instructions
- A number of bits from the register address field are used to extend the opcode field for those
instructions that have a smaller number of operands.
Moreover, 2 bits are reserved for specifying whether the instruction has 3,2,1 or 0-address(es).
Develop and sketch a scheme for the instruction format with variable opcode for the above cases
- Find the address space for all cases in (a) and (b) for direct and indirect addressing.
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Show the Stack contents to perform the operation:
- X=3*(l+6)/(3+7)
- Show the simplest hardware implementation of:
if [R3]=O thenRl <- R2
Click here to see the solution for 1.1:
Solution of Problem1.1
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| 6 bits | 6 bits | 20 bits |
| I | Opcode | Register | Memory |
Addressing space= 2^20 for direct and 2^32 for indirect
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For 3 address machine: (address space=2^14 and 2^32)
| 2 bits | 6 bits | 5 bits | 5 bits | 14 bits |
| L | I | Opcode | Reg1 | Reg2 | Memory |
For 2 address machine: (address space=2^18 and 2^32)
| 2 bits | 6 bits | 6 bits | 18 bits |
| L | I | Opcode | Reg1 | Memory |
For 1 address machine: (address space=2^24 and 2^32)
| 2 bits | 6 bits | 24 bits |
| L | I | Opcode | Memory |
For 0 address machine: (no address space)
Click here to see the solution for 1.2:
Solution of Problem1.2
1.2
(a) postfix expression: X=316+*37+/
Here is the program that will clearify what the stack will look like
push 3
push 1
push 6
ADD
MUL
push 3
push 7
ADD
DIV
pop
(b)
Problem 2:
For the following assembly program, find the contents of the program counter PC,
the accumulator AC, and the instruction register IR at the end of execution of each instruction,
and the contents of the memory word at address 103:
| Instruction | [PC] | [AC] | [IR] |
| ORG100 | ---- | ---- | ---- |
| BSA 103 | ---- | ---- | ---- |
| CMA | ---- | ---- | ---- |
| HLT | ---- | ---- | ---- |
| ???? | ---- | ---- | ---- |
| CLA | ---- | ---- | ---- |
| INC | ---- | ---- | ---- |
| BUN 103 I | ---- | ---- | ---- |
Click here to see the solution:
Solution of Problem2
| Memory Location | Instruction | [PC] | [AC] | [IR] |
| ORG 100 | 100 | ---- | ---- |
| 100 | BSA 103 | 104 | ---- | 5103 |
| 101 | CMA | 102 | FFFE | 7200 |
| 102 | HLT | 103 | FFFE | 7001 |
| 103 | 101 | ---- | ---- | ---- |
| 104 | CLA | 105 | 0000 | 7800 |
| 105 | INC | 106 | 0001 | 7020 |
| 106 | BUN 103 I | 101 | 0001 | C103 |
Problem 3:
Let the address stored in the program counter of a computer be designated by the symbol XI.
The instruction stored in location XI has an address part X2.
The operand needed to execute the instruction is stored in the memory word whose address is X3.
An index register contains the value X4.
What should be the relationship between the various addresses if the addressing mode of the instruction is
(a) direct (b) indirect (c) relative
(d) indexed?
Take: Xl= 10 hex, X2 = 20 hex, X4 = 30 hex
Click here to see the solution:
Solution of Problem3
a)X3=X2 X3=20hex
b)X3=M[X2]
c)X3=X1+X2 X3=30hex
d)X3=X4+X2 X3=50hex
Problem 4:
Write four different programs to compute: X = A*((B + C)*( D + E)) using three,
two, one and zero address instructions. If the cost of executing one of these programs is given by:
Cost = n*p + m*q, where n, m are the number of instructions and the number of addresses used respectively,
and p and q are constants. Draw the relation between cost/p versus r for r=0,1,2,3,4,5
where r = q/p.
Discuss your results.
Click here to see the solution:
Solution of Problem4
Using zero address:-
n=10;m=6
push B
push C
ADD
push D
push E
Add
Mul
push A
Mul
pop
Using one address:-
n=8;m=8
Load B
Add C
Store T
Load D
Add E
Mul T
Mul A
Store X
Using two address:-
n=7;m=14
Mov 1,B
Add R1,C
Mov R2,D
Add R2,E
Mul R1,R2
Mul R1,A
Mov X,R1
Using three address:-
n=5;m=14
Add R1,Rb,Rc
Add R2,Rd,Re
Mul R3,R1,R2
Mul R4,R3,Ra
Mov M[x],R4
Problem 5:
Design the hardware control implementation of the PC of the basic computer
Click here to see the solution:
Solution of Problem5
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