EurIng  Gavin Wood  B.Sc.(Hons), CEng, MIET.

EDINBURGH

SCOTLAND

 

CONTACT DETAILS.

Office     :               +44 (0)7092 – 377519

E-mail    :               [email protected]

Mobile    :               +44 (0)7711 – 192928

Website :               www.geocities.com/gavin_wood

 

PERSONAL INFORMATION.

Date of Birth        : 21 April 1958

Nationality            : British

Languages            : English, German

Marital Status      : Married

 

EDUCATION & QUALIFICATIONS.

HERIOT-WATT UNIVERSITY,  (1977-1980)                Edinburgh, Scotland, UK

 First Class B.Sc.(Hons) degree in Electrical & Electronic Engineering.

 

GORDONSTOUN SCHOOL,  (1970-1976)                       Elgin, Morayshire, Scotland, UK

 A’ Level - Maths, Physics.

 O’ Level - Maths (Pure/Applied), English(Literature/Language), Physics, Biology, Chemistry, History

 

PROFESSIONAL AFFILIATION.

1993                European Engineer  (EurIng) British National Committee for FEANI.

1986                Chartered Engineer  (CEng)    Institute of  Engineering & Technology.

 

CAREER SUMMARY.

Real-time systems software architecture development. Specialising in object oriented analysis & design, design patterns, multi-threaded applications, implementation in C++  & Java languages. Software development comprising analysis, design, implementation, integration & test phases.

 

Software Engineering

 Process

Rational Unified Process, Agile/Iterative Development

OOA/OOD

UML, Rational Rose & Rose RealTime, Object Int. Together, Artisan Real Time Studio

 

Development Languages & Operating Systems

C++

Windows CE, Windows XP Embedded, Unix(HP, Solaris), VxWorks, GNU, Embedded Systems

Java

Windows, Unix(HP, Solaris), J2EE (RMI, JNI),  J2SE, J2ME(MIDP 2.0), JavaCard.

 

 

Development Tools

C++

Microsoft Visual Studio C++ .NET, Windows CE & XP Embedded, Unix, GNU, VxWorks, STL , Boost library

Java

Borland J Builder, J Builder Wireless Edition, Sun Wireless Toolkit, Sun NetBeans, Eclipse.

Generic

Clearcase, Clearcase UCM, ClearQuest, Clearmake, Purify, Quantify, Simulators, CygWin, PVCS Tracker, RequisitePro

Debugger

Etnus TotalView, Source Insight, ddd, dde, gdb, vxgdb, Visual Studio, WinCE.

ICE

Lauterbach Trace32

 

 

Unit Test Environments

C++

CppUnit

Java

JUnit, J2MEUnit

 

 

Interface/Communication

 

RS232, HDLC, GPIB, VME, PC, CAN-Bus, MOST-Bus, Sockets, Datagrams, Http, XML

 

 

Personal Software Development

C++

Windows               Microsoft Visual Studio, Win32/MFC, StlPort , Boost.

GNU                       CygWin, Xemacs, ddd,  insight, stlport, g++, gcc.

Java

MIDlet MIDP 2.0 applications available at  www.geocities.com/gavin_wood
Developed using Sun NetBeans IDE


CAREER HISTORY.

 

Selex Communications  (Military Networks),  Chelmsford, UK ( June 2006 –  … )

 

HF2000 High Frequency Radio System:

                Rational Rose RealTime (RoseRT) C++ OOA/OOD consultant on the HF2000 high frequency military communications system. Developing RoseRT C++ code for WindowsXP embedded target platforms. Each communications node comprises multiple NCTs (Network Control Terminal), each networked to a CCU (Comms control unit), RTU (Receiver control unit) & TCU (Transmitter control unit) .

                Rational Unified Process (RUP) software development. Windows development tools comprised Clearcase version control, ClearQuest defect management, Rational Rose RealTime (C++/UML), Connexis (inter process/platform communication) , Microsoft Visual C++ .Net, STL & Boost library.

                System Framework comprised Connexis for remote communication, ServiceDespatcher for publication & subscription of services, and StatusSubsystem for publication & subscription of status items.

                OOA/OOD using Rational RoseRT (UML), comprising use cases, collaboration, sequence, class & package diagrams. Design of capsules, protocols, passive classes, state machines. Boost library’s thread, smart ptr & serialization. STL maps, queues, strings, generation of functor & predicate classes. Distributed systems communication using Connexis integrated with RoseRT. Design patterns included Observer/Observable, Singleton, Proxy Strategy, State & Factory.

                Subsystem design code & test of components ‘SoftwareDownload’ for update of remote RSCU software. ‘StationManagement’ for creation & management of stations comprising multiple RSCUs. ‘RscuEquipmentStatus’ for reporting of station status. ‘EngineeringParameters’ for persisted storage & update to subsystems. ‘RscuProxy’ for  proxy interface to remote rscu. ‘RscuMonitor’ for monitor of remote RSCU and publication of status. ‘StationController’ comprising StationStateMachine, which delegated StationType specific behaviour to concrete StationStrategy, StationStrategyFactory for instantiation of concrete StationStrategy.

                Unit test performed by generation of Subsystem test capsules, test environment debugging within RoseRT environment and Microsoft Visual C++ .Net debugger.

                Target hardware debugging  using Microsoft Visual C++ .Net debugger, and RoseRT debugger, both attached to remote WindowsXP process.

 

 

 

 

Actaris  (Metering Systems),  Felixstowe, UK ( June 2005 –  May 2006 )

 

ACE4000 GPRS Metering System:

OOA/OOD UML & J2ME lead consultant on the ACE4000 GPRS electricity metering system. Developing J2ME Java code for the Siemens TC65 (ARM 7) based ACE4000 metering unit. System monitors electricity billing & load profile & transmits datagram packets via GPRS to the server. Server updates master meter & slave (x20) meter profiles (load & billing configuration) & jar file software upgrades.

                Windows development tools comprised Clearcase version control, Artisan Real Time Studio, Eclipse IDE, J2ME Wireless toolkit (MIDP 2, CLDC 1.1), PVCS Tracker, and Rational Requisite Pro.

                OOA/OOD using Artisan (UML), comprising use cases, scenarios, interaction, class & package diagrams. Category design & Java implementation of ‘Meter Manager’ comprised the dynamic management of master & 20 slave meters. ‘Encode XML’ comprised the XML encoding of data for transmission. ‘Decode XML’ comprised the decoding of received data. ‘Billing Manager’ comprised the acquisition, persistent storage & transmission of billing data. ‘Load Profile Manager’ comprised the acquisition, persistent storage & transmission of electricity load usage. ‘GPRS Manager’ comprised Datagram reception & transmission of data from/to the Vantage server. ‘Thread Monitor’ for monitoring of the system threads.

                J2ME Java application implementation using MIDP APIs. Generation of interface, abstract & concrete classes,  extensive use of design patterns Singleton, Observer/Observable, Factory, Command & Template. Participation in design reviews, code reviews & unit test reviews.

                J2MEUnit, generation of unit tests for all packages developed. J2MEUnit update for operation on Siemens TC65 module.

 

 


 

Xerox  (Office Products Development Unit),  Welwyn Garden City, UK ( April 2004 –  May 2005 )

                               

Armada (Dual Print Engine) Printer/Copier Project.

                OOA/OOD C++ consultant on the Armada dual print engine product. GNU C++ code development of event driven multi-threaded components for the Scanning & Image Processing (SIP) subsystem.

Windows development tools comprised Clearcase UCM version control & Artisan Real Time Studio. GNU C++ tools comprised Xemacs, clearmake, g++ compiler, gnu STL, Etnus TotalView & ddd debuggers.

                OOA/OOD using Artisan Real Time Studio(UML), comprising use cases, scenarios, interaction  & class diagrams. Category design & C++ implementation of  'Media Manager' for tracking of media based on type, size & colour. ‘Service Counters’ comprised counters for service calls , customer billing & system faults. ‘CRU/CRUM’ comprised customer replaceable units, Toner Bottle, Ozone Filter, Fuser & Xerographic units. ‘Configuration’ comprised system product configuration, Feeder, Finisher, Iot & Nvm product specific types.

                C++ multi-threaded implementation making extensive use of message queues & task instantiation using Xerox proprietary runtime OS. Extensive use of gnu STL containers & design of functor & predicate classes.

Generation of HLD & API documentation. Fagan inspections of design documentation & code reviews. Change Control Board review prior to code delivery from Clearcase UCM development to integration view.

                C++ unit testing using CppUnit, generation of unit tests & integration tests. Debugging on Linux Host using  Etnus TotalView debugger using simulators for GUI & x2 IOTs (Image Output Terminal) components.

 

 

Sci-Worx/Comneon,  Linz, Austria ( May 2003 –  March 2004 )

 

APOXI Mobile Phone Framework.

OOA/OOD C++ & J2ME consultant on the APOXI Framework & Reference MMI for wireless devices project. Developing C++ & Java components for the APOXI framework & integration of  externally supplied Java Application Manager. Offsite two-week training course on  APOXI framework & Lauterbach debugger.

Development tools comprised Clearcase version control, Rational Rose (UML), Microsoft Visual C++, Borland J-Builder Mobile Edition, CygWin, Apache server, Kannel WAP gateway & Lauterbach debugger.

                Rational Rose (UML) design of APOXI  to JBED/JAM interfaces for Graphics, File System, Font & Sound components based on MIDP APIs, creating sequence & class diagrams.

Microsoft Visual C++ implementation of APOXI interface to externally supplied JAM (Java Application Manager) & JBED (CLDC 1.0, MIDP 1.1, KVM). Extensive use of Adapter pattern for translation from APOXI framework to JAM/JBED interface. Host /Target compilation & test for ARM 9 & Siemens C166.

                Borland Mobile Edition J2MEUnit generation of test MIDlets for MIDP packages to validate functionality of APOXI/MIDP interfaces. Installation of Apache Server, Kannel WAP gateway & MIDlet website. Target Phone (connection via PPP & OTA) download/execution of test MIDlets.

                Target debugging of APOXI C++ & Java MIDlets using Lauterbach debugger for S-Gold (ARM 9) & E-Gold (Siemens C166) targets.

 

 

Giesecke & Devrient,  Munich, Germany ( Oct 2001 – April 2003 )

 

JavaCard SIM/USIM Project.

                OOA/OOD Java & C consultant on the JavaCard UICC project. Developing Java & ‘C’ components of the PIN Management Security System for the 2G (SIM) & 2G/3G (USIM) versions of the JavaCard.

                Windows development tools comprised Clearcase version control, Object International Together, Borland J-Builder, & Microsoft Visual C++. Unit testing performed using JUnit & CppUnit.

                Analysis of 2G SIM specifications (GSM 11.11/11.14) & 3G USIM specifications (ETSI 102.221/102.222). PIN Management Security System design using Together comprising use cases, scenarios, interaction diagrams & class diagrams.

                Java implementation of  SIM/USIM pin management; code refactoring of time critical packages to ‘C’, generation of Java Native Interface between Java/C. JUnit & CppUnit generation of unit tests.

                Integration testing of developed software by generation of XML scripts containing APDU command/response messages for validation of the software on workstation simulation environment & target JavaCard (Hitachi AE46C).


Ericsson,  Nurenberg, Germany (Jan 2001 – Aug 2001 )

 

 UMTS Node-B Transmitter/Receiver Baseband Processing .

                OOA/OOD Rational RoseRT C++ consultant on the UMTS Node-B TRX (Transmitter/Receiver) baseband processing unit. Target platform is OSE/Cello for the PowerPC. Rational RoseRT C++ development of database component using capsules, ports, protocol classes, implementation of Node-B requirements.

                Unix (Solaris) development tools comprised Rational RoseRT (C++), Xemacs editor, Clearmake compiler & Clearcase.  Offsite two week training on Rational RoseRT (C++).

                Rational RoseRT design & C++ implementation of Database component comprising use cases, scenarios, interaction diagrams , capsule class diagrams, capsule structure diagrams & capsule state diagrams. C++ implementation using capsules, ports, protocols & signals .Database functionality comprised interrupt driven hard real time measurement & supervision functions & hardware access & control functions. Design  & implementation of capsule Group (has n Sets), capsule Set (has n Devices), capsule Device (has supervision & measurement), capsule Supervision/Measurements (has hardware access) & capsule Hardware Access. Design patterns included Observer/Observable for registration of measurements with frame handler, Factory for hardware access via FPGA or ASIC with different register mappings, & Singleton for Factory.

Generation & execution of test cases to verify database functionality on Host simulation environment & RoseRT Runtime view.

                Verification of Database component on Target hardware, debugging using Lauterbach Trace32 debugger.

 

 

Siemens,  Regensburg, Germany (Jan 2000 – Dec 2000 )

 

Multi Media Integrated Driver Information System (MMIDIS).

                OOA/OOD C++ consultant on the Multi Media Integrated Driver Information System (MMIDIS) project using the MOST (Media Oriented Systems Transport) optical bus. WinCE C++ development of production version of the prototype IDIS system.

                Windows NT development tools comprised Together OOA/OOD, Visual C++ V6, CE Toolkit, Embedded Visual C++ V3, Clearcase version control & STL (www.stlport.org).

                Target comprised Hitachi SH4 & Intel x86 Windows-CE platforms connected to peripherals (Phone, CD Player, Tuner, Audio Manager) via the MOST optical bus. Design of Head Unit (Server), Front Ends (Slaves) & MOST-Bus peripheral control.

                OOA/OOD using Together (UML), comprising use cases, scenarios, interaction diagrams & class diagrams. Category design & C++ implementation of  'Controller' for the control of the MOST devices  comprising Phone, CD Player, Tuner, Audio Manager. 'Most Services' interface to the Oasis MOST-Bus  for Encode/decode of MOST messages & transmission/reception over bus.

                Extensive use of  design patterns; C++ development using Microsoft foundation classes; threads, events, exceptions, & STL (www.stlport.org). Maintenance of STL configuration files for NT & CE projects.

                C++ development & test of code under WindowsNT; porting of code on X86 & SH4 target hardware. Software/Hardware integration under NT & CE (x86,SH4) platforms. C++ generation of unit tests using CppUnit test environment. Code conformance testing with PCLint.

 

 

Hewlett-Packard,  Edinburgh, Scotland (July 1999 - Dec 1999)

 

System 7 Monitoring System.

                OOA/OOD C++ & J2EE consultant on System7 monitoring system. Developing C++ , Java (J2EE) & JNI code for the System Monitoring Agent subsystem.

                Windows development tools comprised Borland J-Builder for the generation, verification & test of Java code. Unix (HP) development comprised C++ code generation; Clearmake compiler; Distributed Debugging Environment (dde); Clearcase, Rational Rose & STL (www.stlport.org) .

                System Monitoring Agent (servlet) monitors resources of networked clients which publish their resource loading at a defined rate, system monitoring agent servlet subscribes to published data & generates html report pages for analysis. Rational Rose OOA/OOD of data acquisition & distribution system.

Generation of Java, JNI & C++ code generation for server resource loading accumulation & publication as dynamic html pages, generation of client browser Applet.

                Generation of test platform for unit testing; generation of test class for each developed class.


 

Siemens,  Regensburg, Germany (Jan 1998 - Jun 1999)

 

Integrated Driver Information System (IDIS).

                OOA/OOD C++ consultant designing C++ components for the Integrated Driver Information System (IDIS) project using the MOST optical bus. Development of technology demonstration prototype unit.

                WindowsNT development tools comprised Together OOD tool, Visual C++ V6, CE Toolkit for Visual C++ V6, CE Platform Builder V2.11 & Intersolv PVCS version control.

                Target hardware comprises Hitachi (SH3) & Intel IAPX Windows-CE platforms connected to peripherals via the MOST optical bus. Design of Multi Purpose Platform (MPP) server, Front-End clients & control of MOST peripherals, CD player, Tuner, Amplifier & Phone.

                OOA/OOD using Together (UML) comprising use cases, interaction  & class diagrams. Category design & C++ implementation of  'Priority Management' for MOST device channel allocation, connection & arbitration; 'Resource Management' for MOST physical device detection & instantiation of logical device drivers; 'Drivers' for low level logical device drivers for interface to the physical MOST devices; 'MOST-Bus' for the interface to the MOST bus via I2C or Parallel interface drivers to Oasis low level MOST driver.

Microsoft Visual C++ code generation & test for WindowsNT & target hardware.  Microsoft foundation classes, threads, events & exceptions. Generation of project workspace comprising multiple DLL & executable projects.

 

 

 

Hewlett Packard,  Boeblingen, Germany (July 1996 - Dec 1997)

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HP83000 Integrated Circuit Tester.

                OOA/OOD C++ consultant designing C++ software for the HP83000 real time integrated circuit tester to execute on HP-Unix (10.2) & Windows-NT (4.0) platforms.

                Object Oriented Design using Fusion methodology (Fusion CASE) comprising object, interaction & class diagrams making extensive use of design patterns.

                HP-Unix tools executed under the Common Desktop Environment (CDE) & comprised Frame-Maker for documentation; Xemacs editor; Clearmake compiler; Distributed Debugging Environment (dde) debugger; Purify memory leakage detection; Pure Coverage test path coverage, Quantify performance measurement; & Clearcase software configuration & control.

                Category design & C++ implementation of  'Document-Core' which described the specifications/tests for the device under test, saving/retrieval of the document objects to/from the database; 'Tester-Property' for the tester measuring instrument characteristics & resource description.; 'Setup' setup of the test-head spec, device spec, equation spec & test vector spec; ‘Setup-Translator’ for translation of hardware independent view (Category ‘Setup’) to hardware dependent view & download of parameters to the tester hardware.

                Category testing by generation of test classes for test execution under UNIX & NT platforms.

 

 

Diehl, Nurenberg, Germany (Mar 1995 - July 1996).

 

Submunition Artillery 155mm.

                OOA/OOD C++ consultant developing C++ software for the SMArt-155 automated production system.

                Unix (Solaris) development system connected via the LAN to the target. Target system is VxWorks for the Motorola MC68030 using the VME-bus; hardware cards comprised Force CPU-30, IBC-20, CAN-Bus & IMC5 motion controller. Configuration & Control of software using Intersolv PVCS Version manager.

                Rational Rose/C++  OOD (Booch methodology) of Design Doc. comprising Use Case, Scenario, Class & Object diagrams. Automatic code generation from class diagrams.

                Solaris, category design & C++ code generation. Interface to VxWorks target using remote procedure calls. Interface to file system for persistent data storage.

                VxWorks, C++ category design, class design & code generation. Code for interrupt service routines, semaphores, message queues & remote procedure calls. Category’s comprised Low Level Device Drivers; Measurement Instruments; Signal Generators & Motion Controllers.

                Software & Hardware/Software Test/Integration using gdb (Unix) & vxgdb (VxWorks) debuggers, BusView VME-Bus analyser, CAN-Bus analyser & IEEE-488 bus analyser. Generation of test class specification, procedure & software for exhaustive testing of all generated classes.


 

Litef, Freiburg, Germany (Sep 1992 - Feb 1995).

 

European Fighter Aircraft Inertial Measurement Unit.

                TMS320C25 assembly language consultant designing safety critical software (Risk Class 1) to DOD-STD-2167 for the European Fighter Aircraft (EFA) Inertial Measurement Unit (IMU) quadruple redundant system.  TMS320C25 assembly language implementation of packages for IDP software, comprising scheduler, digital filtering, fast fourier transforms, accelerometer & gyro compensation & control, instrument failure detection isolation & compensation, built in test functions. Unit & integration testing performed using 'Software Control Panel'; generation & execution of unit test description files (TDF) for 100% branch coverage, code walk through of assembly language code.

                Microsoft Visual C++  design & implementation of  'Software Control Panel' for unit & integration tests executing on IBM-PC. Generates unit & integration test report files, instruments code & generates branch coverage information.

                MKS Toolkit generation of AWK script files for manipulation of software source code for unit testing. Format conversion of systems generated validation data for interface to the 'Software Control Panel'.

 

Diehl, Nurenberg, Germany (Apr 1990 - July 1992).

 

Submunition Artillery 155mm.

                TMS320C26 assembly language consultant software engineer engaged in digital signal processing. Software architecture design using Yourden. Generation of software Requirements Spec, Design Doc, Test Plan & Test Procedure. TMS320C26 assembly language design & code of Operational Flight Software, unit test software & hardware test software. Code test using journal files & software development system.

 

British Aerospace, Stevenage, UK (Sep 1987 - Apr 1990)

 

Long Range Anti Tank System.

                Section leader responsible for the architecture definition & design of guidance system; comprising four TMS320C25 processors & analogue data acquisition circuitry. Software specification generation & TMS320C25 assembly language code generation for scheduler, digital filters & fast fourier transforms.

 

Northrop Corporation, Mass, USA (May 1985 - Aug 1987)

 

Standard Attitude & Heading Reference System (SAHRS).

                Senior hardware/software engineer. Intel-8751 Hardware Design, RAM, ROM & PAL's. Assembly Language specification, code & test for control of SAHRS gyros (Tri-range) & accelerometers, data filtering & transmission to General Processor (GP). HPIB Test Equipment interface card design for real time capture & analysis of SAHRS outputs.

 

British Aerospace, Stevenage, UK ( Sep 1980 - May 1985)

 

Digital Autopilot Design.

                Graduate hardware/software engineer. Autopilot Design for the Swingfire anti tank missile comprising Intel-8048 processor. Assembly language code programming using Intel MDS system.

                AMD Bit Slice processor hardware design & micro code generation for digital autopilot demonstration unit. Comprising 128bit wide instructions, ALU, Multipliers, pipelining.

 

 

Heriot Watt University, Edinburgh, UK ( Sep 1977 - July 1980)

                Undergraduate Apprenticeship (1-3-1)  at Heriot-Watt University (1977-1980), sponsored by British Aerospace. Graduated with First Class Honours Degree in Electrical & Electronic Engineering.

 

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