;========================================================================== ; ; Diva LVS Rule File ; Modofied by Fuding Ge ;-------------------------------------------------------------------------- lvsRules( procedure( combineParallelFET( m1 m2 ) /***************************** * combine parallel FETs ****************************/ prog( (mt m_m1 m_m2) mt = list( nil ) if( ((m1->l != nil) && (m2->l != nil)) then if( (m1->l != m2->l) ; don't combine different lengths return( "doNotCombine" ) ) mt->l = m1->l ) ; check for "m" (multiplier) parameters if( (m1->m != nil) then m_m1 = m1->m else m_m1 = 1 ) if( (m2->m != nil) then m_m2 = m2->m else m_m2 = 1 ) if( ((m1->w != nil) && (m2->w != nil)) then mt->w = (m_m1 * m1->w) + (m_m2 * m2->w) ) return( mt ) )) ; combine parallel resistors procedure( combineParallelRes( r1 r2 ) prog( (rt) rt = list( nil ) if( ((r1->r != nil) && (r2->r != nil)) rt->r = (r1->r * r2->r) / (r1->r + r2->r) ) return( rt ) )) ; combine series resistors procedure( combineSeriesRes( r1 r2 ) prog( (rt) rt = list( nil ) if( ((r1->r != nil) && (r2->r != nil)) rt->r = r1->r + r2->r ) return( rt ) )) procedure( compareResistor( r1 r2 ) ; r1->layout, r2->schematic /* * compare resistance values of two resistors */ prog( (errMsg err) errMsg = "" err = nil ; check to see if there are missing parameters if( (r1->r == nil) then errMsg = strcat( errMsg "Missing resistance property \"r\" (layout)\n" ) err = t ) if( (r2->r == nil) then errMsg = strcat( errMsg "Missing resistance property \"r\" (schematic)\n" ) err = t ) ; if there were, return the err mesg now, since parameter comparison ; would be meaningless if( err then return( errMsg ) ) ; if params were all there, check that they match (within "slack") if( (abs( r1->r - r2->r ) > NCSU_LVSResSlack * r2->r) then sprintf( errMsg "Resistance mismatch: layout %d, schematic %d\n" round(r1->r) round(r2->r) ) return( errMsg ) ) ; everything's ok, return nil return( nil ) )) procedure( compareFET( m1 m2 ) ; m1->layout, m2->schematic /* * compare parameters of two FETs */ prog( (errMsg err m) errMsg = "" err = nil ; check to see if any parameters are missing. if( (m1->l == nil) then errMsg = strcat( errMsg "Missing transistor length property \"l\" (layout)\n" ) err = t ) if( (m2->l == nil) then errMsg = strcat( errMsg "Missing transistor length property \"l\" (schematic)\n" ) err = t ) if( (m1->w == nil) then errMsg = strcat( errMsg "Missing transistor width property \"w\" (layout)\n" ) err = t ) if( (m2->w == nil) then errMsg = strcat( errMsg "Missing transistor width property \"w\" (schematic)\n" ) err = t ) ; if params are missing, go ahead and return an error, since the ; "mismatch" error messages would be meaningless if( err then return( errMsg ) ) ; if params were there, check for length & width mismatch ; XXX - ugly kludge with the constant. can we use a lib. prop or ; techparam? if( ( abs( m1->l - m2->l ) * 1e6 > 0.01 ) then errMsg = strcat( errMsg sprintf( nil "Transistor length mismatch: layout %.2f um, schematic %.2f um\n" m1->l * 1e6 m2->l * 1e6 ) ) err = t ) ; check for "m" (multiplier) parameter on the schematic instance if( (m2->m != nil) then m = m2->m else m = 1 ) ; XXX - this is an ugly kludge with the constant. it'd be nice to ; use a lib prop or techparam. if( ( abs( m1->w - ( m2->w * m ) ) * 1e6 > 0.01 ) then errMsg = strcat( errMsg sprintf( nil "Transistor width mismatch: layout %.2f um, schematic %.2f um\n" m1->w * 1e6 m2->w * m * 1e6 ) ) err = t ) ; if we had an error, return the error string, otherwise return nil if( err then return( errMsg ) else return( nil ) ) )) ; combine series caps procedure( combineSeriesCap( c1 c2 ) prog( (ct) ct = list( nil ) if( ((c1->c != nil) && (c2->c != nil)) ct->c = (c1->c * c2->c) / (c1->c + c2->c) ) return( ct ) )) ; combine parallel caps procedure( combineParallelCap( c1 c2 ) prog( (ct) ct = list( nil ) if( ((c1->c != nil) && (c2->c != nil)) ct->c = c1->c + c2->c ) return( ct ) )) procedure( compareCapacitor( c1 c2 ) ; c1->layout, c2->schematic /* * compare capacitance values of two caps */ prog( (errMsg err) errMsg = "" err = nil ; check to see if there are any missing params if( (c1->c == nil) then errMsg = strcat( errMsg "Missing capacitance property \"c\" (layout)\n" ) err = t ) if( (c2->c == nil) then errMsg = strcat( errMsg "Missing capacitance property \"c\" (schematic)\n" ) err = t ) ; if there were, return the err mesg now, since parameter comparison ; would be meaningless if( err then return( errMsg ) ) ; if params were all there, check that they match (within "slack") if( (abs( c1->c - c2->c ) > NCSU_LVSCapSlack * c2->c) then sprintf( errMsg "Capacitance mismatch: layout %f, schematic %f\n" c1->c c2->c ) return( errMsg ) ) ; everything's ok, return nil return( nil ) )) removeDevice("u1wireSX" short("in" "out")) removeDevice("bump" short("in" "out")) removeDevice("u1wireSY" short("in" "out")) permuteDevice(parallel "nfet" combineParallelFET) permuteDevice(parallel "pfet" combineParallelFET) permuteDevice(parallel "nmos" combineParallelFET) permuteDevice(parallel "pmos" combineParallelFET) permuteDevice(parallel "nmos4" combineParallelFET) permuteDevice(parallel "pmos4" combineParallelFET) permuteDevice(parallel "res" combineParallelRes) permuteDevice(series "res" combineSeriesRes) compareDeviceProperty("res" compareResistor) permuteDevice(parallel "cap" combineParallelCap) permuteDevice(series "cap" combineSeriesCap) compareDeviceProperty("nfet" compareFET) compareDeviceProperty("pfet" compareFET) compareDeviceProperty("nmos" compareFET) compareDeviceProperty("pmos" compareFET) compareDeviceProperty("nmos4" compareFET) compareDeviceProperty("pmos4" compareFET) permuteDevice(MOS "nfet") permuteDevice(MOS "pfet") permuteDevice(MOS "nmos") permuteDevice(MOS "pmos") permuteDevice(MOS "nmos4") permuteDevice(MOS "pmos4") ;ignoreTerminal("nfet" "B" ) ;ignoreTerminal("pfet" "B" ) ;ignoreTerminal("nmos" "B" ) ;ignoreTerminal("pmos" "B" ) ;ignoreTerminal("nmos4" "B" ) ;ignoreTerminal("pmos4" "B" ) )