# Code Table format:
# <hex opcode> <name of opcode> <parameters>
# <parameters> is a list of parameters. Each may be either REG(register), 8
# (a byte), 16(16-bit number), 32(32-bit number), $(pointer by direct
# address), or %(pointer by register). $ is assembled as a 32-bit number, %
# and REG are assembled as a byte, but stand for registers

0 ADD.B 8 REG
1 ADD.W 16 REG
2 ADD.D 32 REG
2 ADD 32 REG
3 ADD REG REG
6E ADD REG REG REG

4 SUB.B REG 8
5 SUB.W REG 16
6 SUB.D REG 32
6 SUB REG 32
7 SUB REG REG
6F SUB REG REG REG

8 MUL.B 8 REG
9 MUL.W 16 REG
A MUL.D 32 REG
A MUL 32 REG
B MUL REG REG
70 MUL REG REG REG

# DiViDe
C DVD.B REG 8
D DVD.W REG 16
E DVD.D REG 32
E DVD REG 32
F DVD REG REG
71 DVD REG REG REG

# Bit-wise OR
10 BOR.B 8 REG
11 BOR.W 16 REG
12 BOR.D 32 REG
12 BOR 32 REG
13 BOR REG REG

14 BXOR.B 8 REG
15 BXOR.W 16 REG
16 BXOR.D 32 REG
16 BXOR 32 REG
17 BXOR REG REG

18 BAND.B 8 REG
19 BAND.W 16 REG
1A BAND.D 32 REG
1A BAND 32 REG
1B BAND REG REG

61 BTEST.B 8 REG
62 BTEST.W 16 REG
63 BTEST.D 32 REG
63 BTEST 32 REG
64 BTEST REG REG

1C CMP REG REG
1D CMP.B 8 REG
1E CMP.W 16 REG
1F CMP.D 32 REG
1F CMP 32 REG
20 CMP.B $ REG
21 CMP.W $ REG
22 CMP.D $ REG
22 CMP $ REG
23 CMP.B $ 8
24 CMP.W $ 16
25 CMP.D $ 32
25 CMP $ 32
42 CMP.B % 8
43 CMP.W % 16
44 CMP.D % 32
44 CMP % 32

26 LD 32 REG
27 LD.B 8 $
28 LD.W 16 $
29 LD.D 32 $
29 LD 32 $

2A LD.B $ REG
2B LD.W $ REG
2C LD.D $ REG
2C LD $ REG

2D LD.B 8 %
2E LD.W 16 %
2F LD.D 32 %
2F LD 32 %

30 LD.B % REG
31 LD.W % REG
32 LD.D % REG
32 LD % REG

45 LD REG REG

33 INCR REG
34 DECR REG
76 INCR.B $
77 INCR.W $
78 INCR.D $
78 INCR $
79 DECR.B $
7A DECR.W $
7B DECR.D $
7B DECR $
7C INCR.B %
7D INCR.W %
7E INCR.D %
7E INCR %
7F DECR.B %
80 DECR.W %
81 DECR.D %
81 DECR %

35 GOTO 32
66 GOTO $
67 GOTO %
82 GOTO REG
36 GPC 32
65 GPC REG
83 GPC %
37 RPC
38 RTP

39 SEND 32 32
3A SEND REG 32
3B SEND REG REG

3C GET 32 REG
3D GET REG REG

3E NOP
3F BRK

40 TRAP 16

41 CPUID REG

#46 GETPS REG
#47 FORKPS
#48 HALTPS REG
#49 RESUMEPS REG

4E PUSH REG
4F PUSH.B 8
50 PUSH.W 16
51 PUSH.D 32

56 PUSH.B $
57 PUSH.W $
58 PUSH.D $
5C PUSHALL

68 PUSH.B %
69 PUSH.W %
6A PUSH.D %
6A PUSH %

52 POP REG
53 POP.B $
54 POP.W $
55 POP.D $
5D POPALL

59 LD.B REG %
5A LD.W REG %
5B LD.D REG %
5B LD REG %

5E LD.B REG $
5F LD.W REG $
60 LD.D REG $
60 LD REG $

6B LD.B % %
6C LD.W % %
6D LD.D % %
6D LD % %

72 RSTOR 32
73 RSTOR REG

74 RLOAD 32
75 RLOAD REG
