-- tbBigALU.vhd 
-- Worked     
-- entities TBdemo
-- Uses alu in alu.vhd
LIBRARY IEEE;
USE work.all;
USE work.mips.all;
USE IEEE.Std_Logic_1164.all; 
USE IEEE.std_logic_signed.all; 
use ieee.std_logic_arith.all;
------------------------------------------------------------------------
--  ENTITY: tbBigALU - Test bench for bigaalu  
-- GENERIC: None
--    PORT: None   
--   NEEDS: BigALU in BigALU.vhd
------------------------------------------------------------------------
ENTITY tbBigALU IS
END ENTITY tbBigALU;

ARCHITECTURE TEST OF tbBigALU IS
    CONSTANT TV1: std_logic_vector(dwordsize - 1 downto 0) := "00000000";
    CONSTANT TV2: std_logic_vector(dwordsize - 1 downto 0) := "11111111";
    CONSTANT TV3: std_logic_vector(dwordsize - 1 downto 0) := "01010101";
    CONSTANT TV4: std_logic_vector(dwordsize - 1 downto 0) := "10101010";
    
    SIGNAL SA: std_logic_vector(dwordsize- 1 downto 0) := (others => '0');
    SIGNAL SB: std_logic_vector(dwordsize-1 downto 0) := (others => '0');
    SIGNAL Func: std_logic_vector(2 downto 0) := "000";
    SIGNAL ALU: std_logic_vector(dwordsize-1 downto 0);
    SIGNAL Zero, Overflow: std_logic;
BEGIN         
    ALUx: ENTITY work.BigALU(Struc)
            PORT MAP(
                    SA, 
                    SB,               
                    ALU,
                    Func,
                    Overflow,
                    Zero
                    );

-- Update SA
    SA <= SA(dwordsize - 3 downto 0)
          &(not SA(dwordsize - 1))
          &(not SA(dwordsize - 1)) after 10 ns;

-- Update SB 
    process(SA)
        VARIABLE I: INTEGER := 0;
    begin
        IF SA = "00000000" THEN
            CASE I IS
                WHEN 0 =>
                    SB <= TV1;
                WHEN 1 =>
                    SB <= TV2;
                WHEN 2 =>
                    SB <= TV3;
                WHEN 3 =>
                    SB <= TV4;
                WHEN OTHERS =>
                    SB <= TV1;    
            END CASE;
            I := I + 1;
            IF I > 3 THEN
                I := 0;
            END IF;
        END IF;    
    end process;      

-- Update Func
    process(SB)
        VARIABLE I: INTEGER := 0;
    BEGIN
        IF SB = TV1 THEN
            CASE I IS
                WHEN 0 =>
                    Func <= "000"; -- AND
                WHEN 1 =>
                    Func <= "001"; -- OR
                WHEN 2 =>
                    Func <= "010"; -- ADD
                WHEN 3 =>
                    Func <= "110"; -- SUB
                WHEN 4 => 
                    Func <= "111"; -- SLT    
                WHEN OTHERS =>
                    Func <= "000";    
            END CASE;                        
            I := I + 1;
            IF I > 4 THEN
                I := 0;
            END IF;
        END IF;    
    END PROCESS;

-- Check answers
    PROCESS
        VARIABLE Ans: std_logic_vector(dwordsize-1 downto 0);
        VARIABLE iSA, iSB, iAns: INTEGER;
        VARIABLE Z, Ov: std_logic;
------------------------------------------------------------------------
-- Function: Signed_Byte_to_Integer - Convverts a signed byte to an Integer  
--   Inputs: Byte - Signed std_logic_vectoor
--  Returns: Integer form -128 to +127   
--    Needs: None
------------------------------------------------------------------------
        FUNCTION Signed_Byte_to_Integer
                (Byte: IN std_logic_vector(7 downto 0)) return INTEGER IS
            VARIABLE Int: INTEGER;
        BEGIN
            Int := 0; --CONV_INTEGER(Byte);
            FOR I IN 7 DOWNTO 0 LOOP
                Int := Int*2;
                IF Byte(I) = '1' THEN
                    Int := Int + 1;
                END IF;
            END LOOP;        
            If Int > 127 then Int := Int - 256;
            END IF;
            return Int;
        END FUNCTION Signed_Byte_To_Integer;
------------------------------------------------------------------------
-- Function: ChkOver - Checks for overfloww when adding integers A and B  
--   Inputs: A, B - integers from -128 to  +127
--  Returns: std_logic bit '1' indicates ooverflow   
--    Needs: None
------------------------------------------------------------------------
        FUNCTION ChkOver(A, B: IN INTEGER) RETURN std_logic IS
            variable Ov: std_logic;
        BEGIN
            IF ((A + B) > 127) or ((A + B) < -128) then
                Ov := '1';
            ELSE
                Ov := '0';
            END IF;
            return Ov;        
        END FUNCTION ChkOver;    
    BEGIN
        wait on SA, SB;
        wait for 1 ns;
        iSA := Signed_Byte_to_Integer(SA);
        iSB := Signed_Byte_to_Integer(SB);
        CASE Func IS
            WHEN "000" =>     -- AND
                Ans := SA AND SB;                                        
            WHEN "001" =>     -- OR
                Ans := SA or SB;
            WHEN "010" =>     -- ADD
                Ans := SA + SB;
            WHEN "110" =>     -- SUB
                Ans := SA - SB;
            WHEN "111" =>     -- SLT
                Ov := ChkOver(isa, -isb);
                if Ov = '0' then
                    If iSA < iSB THEN
                        Ans := "00000001";
                    ELSE
                        Ans := "00000000";    
                    END IF;
                else 
                    Ans := ALU; -- Don't check if overflow
                end if;            
            WHEN OTHERS =>
                Ans := "XXXXXXXX";
        END CASE;
-- Check overflow
        iAns := conv_integer(Ans);
        CASE Func IS
            WHEN "010" =>     -- ADD
                ov := ChkOver(isa, isb);                
                assert (Overflow = ov)
                    report "Bad Overflow flag during ADD!";
            WHEN "110" =>     -- SUB
                ov := ChkOver(isa, -isb);                
                assert (Overflow = ov)
                    report "Bad Overflow flag during SUB!";
            WHEN "111" =>     -- SLT
                ov := ChkOver(isa, -isb);                
                assert (Overflow = ov)
                    report "Bad Overflow flag during SLT!";
            WHEN OTHERS =>
                null;
        END CASE;
        ASSERT ALU = Ans
            REPORT "Bad output form ALU";
        if Ans = "00000000" then
            Z := '1';
        else
            Z := '0';
        end if;        
        ASSERT Zero = Z
            report "Bad Zero flag!";    
    END PROCESS;
END ARCHITECTURE TEST;