------------------------------------------------------------ -- Function: sgnext.vhd - Extends sign bit of half size -- data word in into full size data word out. -- Requires: pkgmips.vhd -- Author: -- Creation: -- Verified: -- Version: ------------------------------------------------------------ ------------------------------------------------------------ -- entity: SignExtend - Extends sign bit -- port: n - Input signal of DHWordSize bits -- nex - Output signal of DHWordSize bits ------------------------------------------------------------ USE work.mips.all; library IEEE; use IEEE.std_logic_1164.all; ENTITY SignExtend is PORT(n : IN std_logic_vector(DHWordSize-1 downto 0); nex : OUT std_logic_vector(DWordSize-1 downto 0) ); END SignExtend; ARCHITECTURE behav OF SignExtend IS BEGIN one : PROCESS(n) VARIABLE I: INTEGER; BEGIN FOR I IN 0 TO DHWordSize - 1 LOOP nex(I) <= n(I); nex(2*DHWordSize - 1 - I) <= n(3); END LOOP; END PROCESS one; END behav;