-- bigalu.vhd Version 2.0 by Dr. Jerry H. Tucker -- Created 10/15/00 Worked -- entities BigALU -- Uses alu in alu.vhd LIBRARY IEEE; USE work.all; USE work.mips.all; USE IEEE.Std_Logic_1164.all; --USE IEEE.std_logic_unsigned.all; use ieee.std_logic_arith.all; ------------------------------------------------------------------------ -- ENTITY: BigALU - Connects 4 ALU slicess together to form a complete -- ALU. -- GENERIC: Width - The size of BigALU thee default is DWordSizr. -- Width will me a multiple of 4 greater than 4. -- PORT: SA - A input to the BigALU -- SB - B input to the BigALU -- ALU - Output of BigALU -- Func - Function to be performeed by BigALU. -- "000" - and -- "001" - or -- "010" - add -- "110" - subtract -- "111" - set on lesss than -- Overflow - Overflow signal -- Zero - If all bits of ALUU = 0 then Zero = '1' -- else Zero = '0' -- NEEDS: alu in alu.vhd ------------------------------------------------------------------------ ENTITY BigALU IS GENERIC(Width: Integer := DWordSize); PORT(SA, SB: IN std_logic_vector(Width - 1 downto 0); ALU: OUT std_logic_vector(Width - 1 downto 0); Func: IN std_logic_vector(2 downto 0); Overflow: OUT std_logic; Zero: OUT std_logic ); END ENTITY BigALU; ARCHITECTURE Struc OF BigALU IS CONSTANT Swidth: INTEGER := Width/4; BEGIN Zero <= Z(0) and Z(1) and Z(2) and Z(3); PROCESS(Func) BEGIN IF (Func = "110") OR (Func = "111") THEN InvB <= '1'; ELSE InvB <= '0'; END IF; END PROCESS ; -- Least significant slice of ALU ALU0: ENTITY work.alu(behav) GENERIC MAP (Slice => 2) PORT MAP ( Ain => , Bin => , Cin => , Result => , Cout => , Operation => , Binvert => , Less => , Zero => ); ALU1: ENTITY work.alu(behav) GENERIC MAP (Slice => 2) PORT MAP ( Ain => , Bin => , Cin => , Result => , Cout => , Operation => , Binvert => , Less => , Zero => ); ALU2: ENTITY work.alu(behav) GENERIC MAP (Slice => 2) PORT MAP ( Ain => , Bin => , Cin => , Result => , Cout => , Operation => , Binvert => , Less => , Zero => ); -- Most significant slice of ALU ALU3: ENTITY work.alu(behav) GENERIC MAP (Slice => 2) PORT MAP ( Ain => , Bin => , Cin => , Result => , Cout => , Operation => , Binvert => , Less => , Set => , Overflow => , Zero => ); END ARCHITECTURE Struc;