To make Dev HSC12 extensible with new variants of the HSC12 and add
older HC12 parts (for fun probably since many of these aren't used), XML
has been employed. There are no Document Type Definition (DTD)
files as yet as the XML definitions are in transition.
The description of the part is currently handled in the following
manner.
Modules are described seperately with files begining with S12*.xml.
These XML files are included as entities external to the actual part
description file.
Part description files begin with MC*.XML.
The entities are then defined as items in the Register Block.
The naming convention for the module files in a example:
"S12ECT16B8CV1.XML"
Section
Description
S12
This
is a Module file
ECT16B8C
The
ID of the Module to Motorolla
V1
Version
of the Module (in user Manual)
This is identical to motorolla's user manual naming system so one can
look up the component and it's details quickly. Sometime code
might be added to luanch Adobe Acrobat for information about a
particular module.
The reason is many of the modules are shared between various
versions. The primary differences between parts are, which of
these modules are in the part, and the amount of flash ram and EEPROM
used. For each processor the ID block is described in the highest
level so that each part has it's own unique ID.
DEV HSC12 is being written to allow the user to insert these Register
definitions into there C/C++ code and to automatically include and
generate the header file with the proper definitions. These
definitions are also used in the startup code to setup the memory
properly. Last but not least the memory.x file is generated for
the linker so that the user doesn't have to fiddle with everything to
get things to work. At the moment this is all in the pre alpha
release stage.
5-18-2004
The XML code mostly works now, currently the generic processor
information is loaded as an entity without complaint. Processor
specific definitions configuration information is also loaded
now. Default selections work for Combo Box's Radio Groups and
Checkboxs now.
The XML register definition information is not yet parsed because that
part of XML parsing system isn't completed nor has the tag that
contains it. All register definition 'sections' are used as
entities, the entities use needs to be defined. Most register
blocks have been already defined for later use as an entity.
Since the processor configuration information and definition
information are in the same file, this file needs to be processed twice.
DTD files have been made as well, I don't know if the XML parser is
even using the DTD information to acertain if the XML data is at least
structurally correct.
For the processor configuration Memory Allocation View things are
currently the BFI method. The program draws the bars at specific
locations only there size may vary. The flash memory map doesn't
changed based on disabling or removing it from the lower 32K of memory.
A small window was added to show the processors memory available
(total) It's right next to the OK button. The OK button is
now the default botton.
