Code Unleash
Compilers
- Simple Calculator: A simple command line calculator developed using flex & gnu-bison. It supports real and/or integer operands and +, -, *, /, () operators.
- Math Calculator: A sophisticated command line calculator for scientific applications developed using flex & gnu-bison. It supports logarithmic, exponential, trigonometric and hyperbolic expressions. The input and output expressions can be either in BIN, OCT, DEC or HEX number systems. One can also select different precisions levels. See the help file and a sample session.
- Simple Calculator Again: This calculator is similar to the Simple Calculator above, only that it has been developed using JFlex & CUP. The parser and Yylex are thus Java classes.
- Cold Editor for C: tclex is a utility developed using flex that converts a C source code into a html file that contains each token suitably color coded as done by the TurboC(TC) editor. Remember that familiar blue screen!?
- A bare-bones Compiler: TACG (Three Address Code Generator) is a bare-bones version of a C-like compiler. TACG generates intermediate code for statements and expressions involving integer literals, variables and operators. It contains only two kinds of statements in the following order-
- declaration (and/or initialization) of int variables
- statements and expressions involving integers
The source may also contain single line comments. The operators allowed are same as that of K&R-C () ! ~ ++ -- + - * / % + - << >> < <= > >= ++ != & ^ && || ?: = += -= *= /= %= &= ^= |= << >>=. Tacg has been developed using JFlex and CUP tools for java. See also
TacgApplet and Readme. Modifying the tacg application just got easier with 4 new bat files!
Artificial Intelligence
VHDL
- Some simple VHDL entities & testbenches: This zip
file contains some elementary entities(and their testbenches) that we studied in DCS-I. It includes- AND, OR, XOR, JKFF, DFF, DECODER3x8, MUX4x1, FULL_ADDER, BINARY_ADDER(4 bit), BCD_ADDER(4 bit, not working:(), 3-bit COUNTER. All these were compiled and simulated successfully using VHDLSimilie from Sonata.
- VHDL Experiments: This zip
file contains-
- An 8-bit ALU that instantiates 8 X 1-bit ALU elements and its testbench.
- A behavioral bcd counter and a structural bcd counter using 4 T-Flip-Flops and their testbenches.
- A behavioral hex counter and a structural hex counter that uses 4 JK-Flip-Flops and their testbenches.
- A binary to gray code convertor (that uses a look up table mechanism by converting the input binary code into an index) and its testbench.
- A data demultiplexer to time-demultiplex 4 bit data to 3X4-bit output lines and its testbench.
- A simple 2x4 decoder and a 4X2 encoder and their testbenches
- A generic 6-in-1 D-Flip-Flop (that can either have synchronous or asynchronous reset, it can either be level-triggered (like in a latch) or +ve or -ve edge triggered) and its testbench.
- A N-bit latch (that instantiates the generic DFF above with synchronous reset and level trigger) and its testbench.
- A N-bit register (that instantiates the generic DFF above with synchronous reset and -ve edge trigger) and its testbench.
- A Serial-In-Parallel-Out (SIPO) register (behavioral) and its testbench.
- A Traffic Light Controller with generic time period that instantiates 2 traffic light record types for a X-junction and its test bench. The traffic light contains 4 signals, Go, Stop, Left and right. For a X-junction it was observed that only 2 instances were sufficient instead of 4 since the lights that were back to back are in identical states at all times.
- A state-machine to check if the input binary number is divisible by 5 and its testbench.
- A package called pkg_types that contains some utility types like nibble, nibble_vector, byte, traffic_light, some functions like nibble2natural, a look-up-table for gray2binary conversion, an operator srl for shift right logical of a byte type and procedures for changing the state of the traffic light.
- Finally, the above library called assign depends on a satellite library called lib which is a renamed version of the dcs1 library above with the testbenches and the bcd adder stripped and a new T-Flip-FLop added.
All these were compiled and simulated successfully using VHDLSimilie from Sonata.
8086 Assembly programming
Mu-P 8086 programs: This zip
file contains minimally interactive 8086 assembly programs-
- add2bcd: Reads and adds two 2-digit BCD numbers.
- addNbcd2: Reads and adds N 2-digit BCD numbers.
- addNbcd4: Reads and adds N 4-digit BCD numbers.
- addupbcd: Reads and adds 2 unpacked BCD numbers.
- bcd2asc: Reads a bcd number and converts to ascii.
- asc2bcd: Reads a ascii number and converts to bcd.
- allascii: Prints all ascii characters on the screen.
- clock: Displays current time
- datetime: Displays current time and date
- sort: Reads N bcd numbers, sorts them using bubble sort and prints the sorted list.
- search: Reads a string and searches for a character in it.
- indalu: A minimal 8-bit ALU to demonstrate use of indirect addressing in a way similar to that of function pointers!
- The zip also contains a library of 3 utilities-
- std.inc: contains some frequently used constants and macros
- read.obj & read.inc: for basic routines & macros for reading input data
- print.obj & print.inc: for basic routines & macros for printing output data
- make.bat: a batch file for assembling and linking the assembly programs (and the library files) using tasm and tlink.
All these were assembled using tasm, linked using tlink and debugged using debug.
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