Curriculum Vitae (C.V.) of L.R.T.Clewits
Groesbeek, may 21st 2009
Details:
Name: L.R.T.Clewits BSc (Bert)
Current Position: Senior physical and digital design engineer
Date and place of birth: 05 november 1961, Hoogeveen, Netherlands
Civil Status: Married, 2 children
Address: Stekkenberg 74
6561XM Groesbeek
Phone number: 024-3978324 (private)
06-33922653 (mobile)
E-mail: [email protected]
Specific knowledge and experience:
20 years of experience in the field of designing high speed CMOS
IC’s for audio, video and power management applications.
Personal characteristics:
Enthusiastic team player, reliable, precise, eager to learn, problem solver
Profile of next assignment:
Creating new reliable electronic products in a multi disciplinary design team.
Work experience:
2001 until now: BL Power Management Units.
At ST-Ericsson (former NXP and Philips semiconductors), Nijmegen.
Roles: senior physical designer (5 years):
Responsible for the functional design of the physical mask set of the I.C. and it’s sub blocks.
Incorporating setting up and debugging the back end CAD flow for it.
Making sure the IC meets it’s specifications related to a.o. clock timing(skew), Speed (STA), power consumption, Electro Static Discharge, Electro Magnetic Compatibility and Design for Manufacturing, IO and packaging aspects.
Incoming inspection of blocks from digital and analog engineers for the back end.
Database management and support to third parties.
Roles: senior digital designer (3 years):
Responsible for the VHDL coding, simulation and testability (DFT) of a controller for a successive approximation ADC (SA-ADC) and touch screen for a mutimedia player/ GSM phone including bench testing with a SAM and customer support.
Achievements:
First time right IC for the Samsung GSM phone type: SGH-L700 and J800 and Motorola’s
L800, current production 1 million (Samsung).
On time delivery of an IC for the Apple iPod Classic & Touch and Apple iPhone 3G.
First time right IC for the first Apple iPod series, of which millions are sold.
1995-2001: Digital Audio / Video group.
At Philips Semiconductors Nijmegen and Sunnyvale California US (1997).
Role: senior backend engineer (6 years):
Responsible for the design of the production masks of complex high speed digital IC’s and the related aspects as signal speed and timing sign off (skew, STA and ECO) furthermore aspects as DfM, ESD and EMC, power consumption, ground bounce and failure analysis.
Achievements:
In time delivery of a first time right car audio IC for Ford-Visteon.
Just in time delivery of a vestigial side band video IC for a demo at CES Las Vegas.
Realizing “The Bitsound” A huge (120mm2) audio codec for PC-use for Philips at Sunnyvale (US).
1990-1995 : Solid-state Special Products and Logic product groups.
At Philips Semiconductors Nijmegen.
Roles: senior digital and backend design engineer (5 years):
Performing all the design work to create an IC from creating the functional specification of the digital part up to the sign off of the silicon.
Achievements:
The design of the digital receiver part for a Philips hearing aid chip (digital and Multi Project Waver)
A base station IC for Ericsson (digital partly, layout completely).
A battery management chip for Philips shaver and toothbrush (digital controller and full layout) also Logic product 74LV4799.
A redesign/reverse engineering of a whole Philips Sopho call centre chipset (5) from NMOS to CMOS with only part of the netlist and test vectors (digital and layout)
1987-1990 : ASIC product group (library group and gate-arrays).
At Philips Elcoma Nijmegen.
Role: mix-signal design engineer (3 years):
Achievements:
Successfully redesigning 4 Codec masks for Apple from VLSI CMOS process to Philips C150 process.
Successful creation of the Philips C287 and C150 cell libraries and gate array masters (sea of gates).
Education:
1985-1987 : TH-E (TU-E), University of Twente (Electronics) at Enschede.
1980-1984 : HTS-E at Arnhem (bachelor degree in Electronics).
1974-1980 : HAVO-VWO , Katholiek Veluws College at Apeldoorn.
Courses taken:
Digital Signal Processing
Advanced FPGA design
Advanced Digital Electronics
Design of fast electronic systems
VHDL & VHDL advanced
Robust IC design
Low Power IC design
Digital Timing verification (STA)
Tcl and Unix
Electro Magnetic Compatibility
Several Cadence courses (Virtuoso, Sedsm, PKS, verilogAMS, ICcraftsman)
Several business administration courses
BCP, BCAM (Business Creation And Monitoring)
EHBO/AED(Automated External Defibrillator)
BHV (Bedrijfs Hulp Verlening) in-house emergency and first-aid service
Courses given:
Physical design for analog and digital engineers (2008)
Familiar with:
Cadence, Mentor and Philips IC-CAD tools
CMOS65, 65 nanometer processes and older.
Coreuse, Reuseable IP, Temposync data management, FMEA
VHDL and verilog coding languages
Xilinx FPGA software / Labview / Amsal / PCM
Unix / SED / AWK / tcl / html
Microsoft office, Lotus notes
References:
Mr. W.J. Wagenaar, development group leader at ST-Ericsson: e-mail: [email protected] tel: 024-3595272 / 06-51288527
Mr. H Veerkamp, digital hardware architect at NXP-semiconductors: e-mail: [email protected]
Mr. L Hoefnagel, program manager at NXP semiconductors: e-mail: [email protected] tel: 024-3532506
Hobbies:
Car-club, my classic cars and all aspects of restoration of them.
Restoration of (antique) clocks and watches.
Do it yourself.
Genealogy
Skating, swimming, walking, gardening.