Anshul Mehta
Electrical engineering
Department,
Stanford University
Email:
[email protected]
Website
www.geocities.com/cherry_anshu
Nationality: Indian
I am doing my Masters at Stanford
University in the field of Digital VLSI (EE department).I wish to study further
and
Professional Preparation
Pursuing
Masters, Electrical Engineering, Stanford University
Completed B.E.(Hons)Electrical and Electronics Engineering, BITS
Pilani, India (2000-2004) with a CGPA of 10.00
Professional Experience
Practice School - I Project:
Interfacing Of LCD and Matrix Keyboard using micro controller AT89C52
Duration: 2 months (May 2002 – July
2002)
The
project deals with the study of Atmel 89C52 micro controller and interfacing
it with 32 bit
Liquid Crystal Display (LCD HD
44780) designed by HITACHI and a tactile 4*4 matrix
keyboard. A menu had to be made which
would be displayed on the LCD and depending upon the
keyed input the necessary action had to be
performed and the displayed on the LCD.
It involved various interactions with the research scientists at the
control and instrumentation
division of BARC.
An in depth idea on carrying out
research as well as a useful insight in teamwork
was obtained.
Practice
School - II
Project: Design, Simulation and Testing of Analog and Mixed Signal Circuits
Duration: 6 months (Jan 2004 – June
2004)
I worked as a trainee in National Semiconductors (Indian Design Center), which was a part of
the curriculum of my undergraduate studies. I worked in Analog and
Mixed signal group on RFIDS and PLLs. I characterized various blocks of
RFID tags like shunt and series regulator, charge pump, oscillator, demodulator,
modulator, State machine and various bias circuits. It has helped me to
understand the various analog and digital circuits. It helped me to understand
the principle of backscattering used in modulation.
I studied and helped in designing the Voltage controlled
oscillator of the MNP divider PLL for 1.8 V voltage level. I studied all the
components of PLL including phase frequency detector, charge pump and loop
filter.
Projects
Completed at BITS:
Design
of Switched Capacitor Circuits
Duration: One semester (January 2003 – May 2003)
The project brings out the advantages of switched capacitor circuits and
also describes the various applications .I designed switched capacitor
integrator (inverting and non inverting), stray insensitive integrator and a low
pass filter. It also involved the designing of a cascode operational amplifier.
It made me understand the importance of switched capacitor circuits in analog
signal processing.
Design
and implementation of robotic arm
Duration: One semester (August 2002 – December 2002)
The aim of the project was to design a robotic arm having
three degrees of freedom and interface it with a digital camera. This project
deals with controlling the motion of a robotic arm with the help of stepper
motors. The robotic arm has a gripper, which lifts the object from its initial
object and places it at the desired position .The initial position of the object
is determined by taking an image of the surroundings and then processing the
image.
Design of Optoelectronic Receiver using a
SAGCM Avalanche
photodiode
Duration:
One semester (August 2003 – December 2003)
In
this project an analytical model of front end of an optical receiver composed of
Separate Absorption, Grading, Charge Multiplication (SAGCM) InP-InGaAs Avalanche
photodiode and a preamplifier to estimate the temperature dependence of the
signal to noise ratio has been developed. Signal to noise ratio (S\N) versus
temperature (-20°C
to 80°C)
characteristics have been plotted for various bias voltages of the photodiodes.
From which it can be inferred that receiver performance shows an optimized
signal to noise ratio for a given design and operating condition. An analytical
approach is made to estimate the sensitivity versus bit rate for various
temperatures in a digital receiver using SAGCM avalanche photodiode.
I
intend to publish a paper on the present topic under the guidance of Dr.
V.K.Chaubey. It is in the process of review.
Software
scalable chip – Universal Micro Systems (UMS)
Duration: One semester (August 2003 – December 2003)
This project deals with the study of
the UMS chip and its application in telecommunication. It dealt with parallel processing
of frames of digital data with the help of UMS chip.
Achievements and Honors
Year 2004 -
Awarded the Gold medal for electrical and electronics
engineering
(undergraduation) at BITS, Pilani.
Year 2004 -Awarded
the Stanford fellowship award for MS in Electrical
Engineering.
Year 2003
- Presented a paper at APOGEE (a national level event)
at BITS, Pilani on the topic “Subthreshold regime of MOSFETS “ which dealt
with the translinear principle and an understanding of the MOSFETs in the
perspective of device physics.
Year 2002
– Designed and modelled a visitor counter which was presented at electrical
and electronics exhibition in APOGEE (a national level event)
at BITS, Pilani.
Year
2000-2004 –Received BITS merit scholarship for maintaining a CGPA of 10.
Year
1998 –Awarded Dhirubhai Ambani’s scholarship for excellent performance
in SSC examination.
Synergistic Activities
Member of Hindi
Drama Club Member of Hindi Drama Club, BITS
Pilani. Participated in national level inter collegiate fests like OASIS and
APOGEE.
Member of Hindi Press Club, BITS Pilani.
Best
cadet at NCC All India Training Camp
National
level athlete
Technical Skills
Programming in C
language.
Pspice, Tanner
and cadence tools, Matlab and verilog.