head	1.18;
access;
symbols;
locks
	bsittler:1.18; strict;
comment	@# @;


1.18
date	2001.07.26.07.15.46;	author bsittler;	state Exp;
branches;
next	1.17;

1.17
date	2001.07.17.07.03.10;	author bsittler;	state Exp;
branches;
next	1.16;

1.16
date	2000.05.07.05.25.39;	author bsittler;	state Exp;
branches;
next	1.15;

1.15
date	2000.04.23.05.47.56;	author bsittler;	state Exp;
branches;
next	1.14;

1.14
date	99.08.05.06.00.27;	author bsittler;	state Exp;
branches;
next	1.13;

1.13
date	99.08.04.06.41.37;	author bsittler;	state Exp;
branches;
next	1.12;

1.12
date	99.05.17.20.06.21;	author bsittler;	state Exp;
branches;
next	1.11;

1.11
date	99.04.06.04.20.33;	author bsittler;	state Exp;
branches;
next	1.10;

1.10
date	99.03.31.22.59.37;	author bsittler;	state Exp;
branches;
next	1.9;

1.9
date	98.02.12.06.26.43;	author bsittler;	state Exp;
branches;
next	1.8;

1.8
date	98.02.01.10.46.58;	author bsittler;	state Exp;
branches;
next	1.7;

1.7
date	98.01.31.07.35.22;	author bsittler;	state Exp;
branches;
next	1.6;

1.6
date	98.01.16.06.50.20;	author bsittler;	state Exp;
branches;
next	1.5;

1.5
date	97.12.13.22.34.19;	author bsittler;	state Exp;
branches;
next	1.4;

1.4
date	97.12.08.23.29.09;	author bsittler;	state Exp;
branches;
next	1.3;

1.3
date	97.12.08.05.13.57;	author bsittler;	state Exp;
branches;
next	1.2;

1.2
date	97.12.07.21.43.28;	author bsittler;	state Exp;
branches;
next	1.1;

1.1
date	97.12.06.12.51.19;	author bsittler;	state Exp;
branches;
next	;


desc
@A description of the registers, opcodes, and calling convention, which will
hopefully replace the scrap of paper I've been erasing since October of 1997.
@


1.18
log
@updated notes on 'emu', and added a reference to syscall.h
@
text
@SMOKE-16 Architecture -------------------------------------------
$Id: opcodes.txt,v 1.17 2001/07/17 07:03:10 bsittler Exp $
This document contains a brief description of the SMOKE-16
architecture. None of this is set in stone yet.            --BCWS
-----------------------------------------------------------------

OVERVIEW OF THE SMOKE-16 ARCHITECTURE

The SMOKE-16 is a big-endian 16-bit architecture, capable of
addressing up to 128k 8-bit bytes of memory from user mode (or up to
64k when data and address space are unified.) The supervisor mode
design hasn't been finalized yet, so I won't tease you with much of it
here. There is currently no SMOKE-16 support for floating-point
acceleration, but such support may be added someday, probably using a
variant of the lds/sts instructions.

The user mode is emulated by the 'emu' program, which reflects a few
of your operating system's basic features through SMOKE-16 interrupt
calls (listed in 'smoke16/syscall.h'.) In general, the interrupt calls
have UNIX system call semantics. See the emulator sources and the C
library sources for details.

The assembler syntax is heavily influenced by GNU as (gas) and the GNU
assembler preprocessor (gasp.) In the future, I expect to use gasp as
a preprocessor for all my SMOKE-16 assembly, but for now I use cpp.

REGISTERS

The SMOKE-16 has 16 general purpose registers and 4 system registers
(S-REGS) which are visible to the programmer. Additional mnemonic for
a register are listed after the primary mnemonic. All registers are 16
bits wide.

- SYSTEM REGISTERS (%sX)

  %s0/%pc: program counter, contains address of the current instruction
  %s1/%ps: processor status, contains several fields:
    - 0x8000: supervisor mode (K) (not yet...)
    - 0x7f00: [mask] priority of current hardware interrupt (not yet...)
    - 0x00c0: [mask] comparison flags:
      0x0080: "less than"/"carry"/"borrow" flag (C)
      0x0040: "equal to"/"zero" flag (Z)
    - 0x003f: [mask] reserved for future use
  %s2/%pt: page table base (not yet...)
  %s3/%tt: trap table base (not yet...)

- GENERAL REGISTERS(%X/%rX)

  %0/%r0: always 0x0000, writing to it has no effect
  %1/%r1/%t0: temporary, saved
  %2/%r2/%t1: temporary, saved
  %3/%r3/%t2: temporary, saved
  %4/%r4/%t3: temporary, saved
  %5/%r5/%t4: temporary, saved
  %6/%r6/%t5: temporary, saved
  %7/%r7/%t6: temporary, non-saved (reserved for assembler use)
  %8/%r8/%a0: argument 0/return value 0, non-saved
  %9/%r9/%a1: argument 1/return value 1, non-saved
  %10/%r10/%a2: argument 2/return value 2, non-saved
  %11/%r11/%a3: argument 3/return value 3, non-saved
  %12/%r12/%fp: frame pointer (points to caller's frame pointer)
  %13/%r13/%sp: stack pointer (points to highest unused word on stack)
  %14/%r14/%ra: return address
  %15/%r15/%gp: global pointer (use discouraged)

- By convention, return values of 4 words or less are returned in
  %a0.. %a3, and all other values are returned by having the caller pass the
  address of a temporary structure on the stack as an "invisible" first
  argument. *This address is returned by the callee.*

- By convention, arguments of more than 4 words are passed by reference
  to temporary stack space set aside by the caller. Arguments past the fourth
  word are passed on the stack in the caller's frame, with the first
  argument at the lowest address.

- Saved means a function should return the register to its
  original state before returning. Non-saved means a function should
  place the value on the stack before calling a sub-function, and
  restore it from the stack after the sub-function returns.

INSTRUCTION SET

The SMOKE-16 has a fixed-length instruction word of 16 bits. This is
somewhat limiting (SMOKE-16 has only 32 actual instructions,) but it's
not an insurmountable obstacle. Many instructions commonly used on
other processors are aliased to one or more actual instructions
with additional arguments. Some instructions have more than one name,
and the different names can be used interchangeably.

Actual instructions are marked with a double asterisk ('**');
Aliased instructions are marked with a double dash ('--').

See the end of this file for additional notes.

MOV/LD/ST/LDS/STS/LDI - load/store word

-- mov <symexpr>, %rdest
-- ldi <symexpr>, %rdest
   => sethi %hi(<symexpr>), %rdest
      movb %lo(<symexpr>), %rdest

-- mov %rsrc, %rdest
-- st %rsrc, %rdest
   => or %0, %rsrc, %rdest

-- mov [<symexpr>], %rdest
-- ld [<symexpr>], %rdest
   => sethi %hi(<symexpr>), %t6
      movb %lo(<symexpr>), %t6
      mov [%t6 + %0], %rdest

** mov [%raddr + <offset4>], %rdest
-- ld [%raddr + <offset4>], %rdest
   Encoding: 0x6000 | (rdest << 8) | ((offset4 & 0x1e) << 3) | raddr
   Load the word starting at <offset4> + %raddr into %rdest.

-- mov [%raddr], %rdest
   => mov [%raddr + 0], %rdest

-- mov %rsrc, [<symexpr>]
-- st %rsrc, [<symexpr>]
   => sethi %hi(<symexpr>), %t6
      movb %lo(<symexpr>), %t6
      mov %rsrc, [%t6 + %0]

** mov %rsrc, [%raddr + <offset4>]
-- st %rsrc, [%raddr + <offset4>]
   Encoding: 0xd000 | (rsrc << 8) | ((offset4 & 0x1e) << 3) | raddr
   Store %rsrc at starting at <offset4> + %raddr.

-- mov %rsrc, [%raddr]
   => mov %rsrc, [%raddr + 0]

** mov %ssrc, %rdest
-- lds %ssrc, %rdest
-- ld %ssrc, %rdest
   Encoding: 0xf400 | (rdest << 4) | ssrc
   [supervisor mode only]
   Copy the value in special register %ssrc into %rdest.

** mov %rsrc, %sdest
-- sts %rsrc, %sdest
-- st %rsrc, %sdest
   Encoding: 0xf500 | (rsrc << 4) | sdest
   [supervisor mode only]
   Copy the value in %rsrc into special register %sdest.

SETHI - set high byte, clear low byte

** sethi <symexpr8>, %rdest
   Encoding: 0x7000 | (rdest << 8) | symexpr8
   Loads <symexpr8> into the upper half of %rdest.
   Clears the lower half of %rdest.

MOVB/LDB/STB/LDBI - load/store byte

-- movb [<symexpr>], %rdest
-- ldb [<symexpr>], %rdest
   => sethi %hi(<symexpr>), %t6
      movb %lo(<symexpr>), %t6
      movb [%t6], %rdest

** movb [%raddr], %rdest
-- ldb [%raddr], %rdest
   Encoding: 0xf200 | (rdest << 4) | raddr
   Load the byte at address %raddr into the low half of %rdest.

-- movb %rsrc, [<symexpr>]
-- stb %rsrc, [<symexpr>]
   => sethi %hi(<symexpr>), %t6
      movb %lo(<symexpr>), %t6
      movb %rsrc, [%t6]

** movb %rsrc, [%raddr]
-- stb %rsrc, [%raddr]
   Encoding: 0xf300 | (rsrc << 4) | raddr
   Store the low half of %rsrc at the address %raddr.

** movb <symexpr8>, %rdest
-- ldbi <symexpr8>, %rdest
   Encoding: 0xe000 | (rdest << 8) | symexpr8
   Load <symexpr8> into the lower half of %rdest.
   Does not affect the upper half of %rdest.

ADD - add to words

** add %rsrc, %rarg, %rdest
   Encoding: 0x0000 | (rdest << 8) | (rsrc << 4) | rarg
   Place the sum of the values in %rsrc and %rarg in %rdest.
   Affects the C and Z flags.

-- add %rarg, %rdest
   => add %rdest, %rarg, %rdest

** add <immed4>, %rdest
-- addi <immed4>, %rdest
   Encoding: 0xfe00 | (rdest << 4) | immed4
   Increment %rdest by <immed4>.
   Affects the C and Z flags.

SUB/SUBI - subtract from words

** sub %rsrc, %rarg, %rdest
   Encoding: 0x1000 | (rdest << 8) | (rsrc << 4) | rarg
   Place the difference of the values in %rsrc and %rarg in %rdest.
   Affects the C and Z flags.

-- sub %rarg, %rdest
   => sub %rdest, %rarg, %rdest

** sub <immed4>, %rdest
-- subi <immed4>, %rdest
   Encoding: 0xfd00 | (rdest << 4) | immed4
   Decrement %rdest by <immed4>.
   Affects the C and Z flags.

CMP/CMPL - compare word

** cmp %rsrc1, %rsrc2
   Encoding: 0xf100 | (rsrc1 << 4) | rsrc2
   Compare %rsrc1 and %rsrc2.
   Affects the C and Z flags. Treats operands as signed.

-- cmpl %rsrc1, %rsrc2
   => sub %rsrc1, %rsrc2, %0

AND - bitwise and

** and %rsrc, %rarg, %rdest
   Encoding: 0x4000 | (rdest << 8) | (rsrc << 4) | rarg
   Place the bitwise AND of the values in %rsrc and %rarg in %rdest.

-- and %rarg, %rdest
   => and %rdest, %rarg, %rdest

OR - bitwise inclusive or

** or %rsrc, %rarg, %rdest
   Encoding: 0x5000 | (rdest << 8) | (rsrc << 4) | rarg
   Place the bitwise OR of the values in %rsrc and %rarg in %rdest.

-- or %rarg, %rdest
   => or %rdest, %rarg, %rdest

XOR - bitwise exclusive or

** xor %rsrc, %rarg, %rdest
   Encoding: 0xb000 | (rdest << 8) | (rsrc << 4) | rarg
   Place the bitwise XOR of the values in %rsrc and %rarg in %rdest.

-- xor %rarg, %rdest
   => xor %rdest, %rarg, %rdest

NOT - bitwise complement

** not %rsrc, %rdest
   Encoding: 0xf000 | (rdest << 4) | rsrc
   Place the bitwise complement of the value in %rsrc in %rdest.

-- not %rdest
   => not %rdest, %rdest

ROL/ROR - rotate bits in word

** rol %rsrc, <immed4>, %rdest
   Encoding: 0x2000 | (rdest << 8) | (rsrc << 4) | immed4
   Place %rsrc rotated left by <immed4> bits in %rdest.
   Affects the C and Z flags.

-- rol <immed4>, %rdest
   => rol %rdest, <immed4>, %rdest

** ror %rsrc, <immed4>, %rdest
   Encoding: 0x3000 | (rdest << 8) | (rsrc << 4) | immed4
   Place %rsrc rotated right by <immed4> bits in %rdest.
   Affects the C and Z flags.

-- ror <immed4>, %rdest
   => ror %rdest, <immed4>, %rdest

SL/SLA/SLL/SR/SRA/SRL - shift bits in word

** sl %rsrc, <immed4>, %rdest
-- sla %rsrc, <immed4>, %rdest
-- sll %rsrc, <immed4>, %rdest
   Encoding: 0x8000 | (rdest << 8) | (rsrc << 4) | immed4
   Place %rsrc in %rdest, and shift it left by <immed4> bits.
   Affects the C and Z flags.

-- sl <immed4>, %rdest
-- sll <immed4>, %rdest
-- sla <immed4>, %rdest
   => sl %rdest, <immed4>, %rdest

** sr %rsrc, <immed4>, %rdest
-- sra %rsrc, <immed4>, %rdest
   Encoding: 0x9000 | (rdest << 8) | (rsrc << 4) | immed4
   Place %rsrc in %rdest, and shift it right by <immed4> bits,
   performing sign-extension of negative values.
   Affects the C and Z flags.

-- sr <immed4>, %rdest
-- sra <immed4>, %rdest
   => sr %rdest, <immed4>, %rdest

** srl %rsrc, <immed4>, %rdest
   Encoding: 0xa000 | (rdest << 8) | (rsrc << 4) | immed4
   Place %rsrc in %rdest, and shift it right by <immed4> bits, 
   treating values as unsigned.
   Affects the C and Z flags.

-- srl <immed4>, %rdest
   => srl %rdest, <immed4>, %rdest

BL/BC/BGE/BNC/BE/BZ/BNE/BNZ/BG/B - conditional and unconditional short branch

** bl <disp8>
-- bc <disp8>
   Encoding: 0xf600 | (disp8 >> 1)
   Branch to <disp8> if the C flag is set.

** be <disp8>
-- bz <disp8>
   Encoding: 0xf700 | (disp8 >> 1)
   Branch to <disp8> if the Z flag is set.

** bne <disp8>
-- bnz <disp8>
   Encoding: 0xf800 | (disp8 >> 1)
   Branch to <disp8> if the Z flag is not set.

** bge <disp8>
-- bnc <disp8>
   Encoding: 0xf900 | (disp8 >> 1)
   Branch to <disp8> if the C flag is not set.

** bg <disp8>
   Encoding: 0xfa00 | (disp8 >> 1)
   Branch to <disp8> if neither the Z flag nor the C flag is set.

** b <disp8>
   Encoding: 0xfb00 | (disp8 >> 1)
   Branch to <disp8> unconditionally.

JAL/J/CALL/RET - long jump, procedure call/return

** jal %raddr + %roff, %rret
   Encoding: 0xc000 | (rret << 8) | (roff << 4) | raddr
   Jump to the address %raddr + %roff, placing the address of the
   instruction which would have been executed next in %rret.

-- jal <symexpr> + %roff, %rret
   => sethi %hi(<symexpr>), %t6
      movb %lo(<symexpr>), %t6
      jal %t6 + %roff, %rret

-- jal <symexpr>, %rret
   => sethi %hi(<symexpr>), %t6
      movb %lo(<symexpr>), %t6
      jal %t6 + %0, %rret

-- jal %raddr, %rret
   => jal %raddr + %0, %rret

-- j <symexpr> + %roff
   => sethi %hi(<symexpr>), %t6
      movb %lo(<symexpr>), %t6
      jal %t6 + %roff, %0

-- j <symexpr>
   => sethi %hi(<symexpr>), %t6
      movb %lo(<symexpr>), %t6
      jal %t6 + %0, %0

-- j %raddr + %roff
   => jal %raddr + %roff, %0

-- j %raddr
   => jal %raddr + %0, %0

-- call <symexpr> + %roff
   => sethi %hi(<symexpr>), %t6
      movb %lo(<symexpr>), %t6
      jal %t6 + %roff, %ra

-- call <symexpr>
   => sethi %hi(<symexpr>), %t6
      movb %lo(<symexpr>), %t6
      jal %t6 + %0, %ra

-- call %raddr + %roff
   => jal %raddr + %roff, %ra

-- call %raddr
   => jal %raddr + %0, %ra

-- ret
   => jal %ra + %0, %0

INT/IRET - interrupt call/return

** int <immed7>
   Encoding: 0xfc00 | immed7
   Store the processor state to the kernel stack, and execute the
   handler for interrupt <immed7>. (Doesn't actually do this in
   emu or emu--, but user code can't tell the difference anyhow.)
   See syscall.h for some useful (i.e., implemented) interrupts.

** iret
   Encoding: 0xffff
   [supervisor mode only]
   Restore the processor state from the kernel stack.

NOP - no operation

** nop
   Encoding: 0xfff0
   No effect.

PUSH/POP - stack pseudo-instructions

-- push
   => sub 2, %sp

-- push %rsrc
   => sub 2, %sp
      mov %rsrc, [%sp + 2]

-- pop
   => add 2, %sp

-- pop %rdest
   => mov [%sp + 2], %rdest
      add 2, %sp

== NOTES ==============================================================
- <value> is an arithmetic expression involving constants, the
  usual C arithmetic operators, and the %hi()/%hi16() and %lo()/%lo16
  constructs.
- %hi(x) is equivalent to x >> 8
- %hi16(x) is equivalent to x >> 16
- %lo(x) is equivalent to x & 0xff
- %lo16(x) is equivalent to x & 0xffff
- constants can be:
  - decimal digits, with optional sign prefix
  - 0 followed by octal digits, with optional sign prefix
  - 0x followed by hexadecimal digits, with optional sign prefix
  - a C character constant (i.e. 'c', '\n', '\0377', '\0x1e', etc.)
- <symexpr> is one of the following:
  - <symbol>
  - .
  - <symexpr> + <value>
  - <symexpr> - <value>

- <offset4> is a doubled 4-bit <value>

- <disp8> is one of the following:
  - <value> (which is interpreted as an absolute address)
  - <symexpr>
  <disp8> has a limited range since is uses a signed, doubled 8-bit
  displacement from the instruction following the branch

- <immedX> is an X-bit <value>

- <symexpr8> is %hi(<symexpr>), %lo(<symexpr>), or <immed8>

=======================================================================
@


1.17
log
@moved bge/bnc docs, shortened "yeahright" comment
@
text
@d2 1
a2 1
$Id: opcodes.txt,v 1.16 2000/05/07 05:25:39 bsittler Exp $
d10 2
a11 3
addressing 128k 8-bit bytes of memory from user mode. The emulator
'emu' only uses 64k 8-bit bytes of memory, since it does not support
separate instruction and data address spaces. The supervisor mode
d14 8
a21 2
acceleration, but such support may be added someday, probably using
a variant of the lds/sts instructions.
@


1.16
log
@*** empty log message ***
@
text
@d2 1
a2 1
$Id: opcodes.txt,v 1.15 2000/04/23 05:47:56 bsittler Exp $
d4 1
a4 4
architecture. While I don't currently have plans to change any of
these instructions, it could still happen. The supervisor mode is
especially prone to change, as the code hasn't been written
yet.                                                       --BCWS
a316 5
** bge <disp8>
-- bnc <disp8>
   Encoding: 0xf900 | (disp8 >> 1)
   Branch to <disp8> if the C flag is not set.

d326 5
@


1.15
log
@minor changes
@
text
@d2 1
a2 1
$Id: opcodes.txt,v 1.14 1999/08/05 06:00:27 bsittler Exp $
d7 1
a7 1
yet.
d10 2
d13 7
a19 4
addressing 128 kilobytes of memory from user mode. The emulator only
uses 64 kilobytes of memory, since it does not support separate
instruction and data address spaces. The supervisor mode design hasn't
been finalized yet, so I won't tease you with much of it here.
d315 27
a341 27
** bl <symexpr>
-- bc <symexpr>
   Encoding: 0xf600 | (symexpr >> 1)
   Branch to <symexpr> if the C flag is set.

** bge <symexpr>
-- bnc <symexpr>
   Encoding: 0xf900 | (symexpr >> 1)
   Branch to <symexpr> if the C flag is not set.

** be <symexpr>
-- bz <symexpr>
   Encoding: 0xf700 | (symexpr >> 1)
   Branch to <symexpr> if the Z flag is set.

** bne <symexpr>
-- bnz <symexpr>
   Encoding: 0xf800 | (symexpr >> 1)
   Branch to <symexpr> if the Z flag is not set.

** bg <symexpr>
   Encoding: 0xfa00 | (symexpr >> 1)
   Branch to <symexpr> if neither the Z flag nor the C flag is set.

** b <symexpr>
   Encoding: 0xfb00 | (symexpr >> 1)
   Branch to <symexpr> unconditionally.
d436 6
a441 1
  usual C arithmetic operators, and the %hi() and %lo() constructs.
d449 1
a449 2
  - .<segment>
  - . (not yet...)
d455 7
a461 1
- <immedX> is a X-bit <value>
a463 3

- branches have a limited range since they use signed, doubled 8-bit
  displacements from the instruction following the branch
@


1.14
log
@Added new multi-operation pseudo-instructions, and new
(old) aliases.
@
text
@d2 1
a2 1
$Id: opcodes.txt,v 1.13 1999/08/04 06:41:37 bsittler Exp $
d414 3
@


1.13
log
@documented the new pseudo-instructions, and noted that %r7/%t6/%7 is reserved for the assembler.
@
text
@d2 1
a2 1
$Id: opcodes.txt,v 1.12 1999/05/17 20:06:21 bsittler Exp $
d77 5
a81 9
somewhat limiting, but not an insurmountable obstacle. Many
instructions commonly used on other processors are either available as
macros in "asm.h" or are aliased to existing instructions with more
parameters. These "pseudo-instructions" are listed after the primary
forms, along with their expanded forms.

Primary forms are marked with two asterisks ('**'); other forms are
marked with two dashes ('--'). See the end of this file for some notes
on the notation used in the descriptions.
d83 6
a88 1
MOV - load/store word
d91 3
a93 2
   Expands to: sethi %hi(<symexpr>), %rdest
               movb %lo(<symexpr>), %rdest
d96 8
a103 1
   Expands to: or %0, %rsrc, %rdest
d106 2
d111 7
a117 1
   Expands to: mov [%raddr + 0], %rdest
d120 2
d125 1
a125 1
   Expands to: mov %rsrc, [%raddr + 0]
d128 3
d135 3
d144 1
d148 7
a154 1
MOVB - load/store byte
d157 2
d161 6
d168 2
d173 2
d181 1
d186 1
a186 1
   Expands to: add %rdest, %rarg, %rdest
d189 2
d194 1
a194 1
SUB - subtract from words
d197 1
d202 1
a202 1
   Expands to: sub %rdest, %rarg, %rdest
d205 2
d213 1
d218 1
a218 1
   Expands to: sub %rsrc1, %rsrc2, %0
d223 1
d227 1
a227 1
   Expands to: and %rdest, %rarg, %rdest
d232 1
d236 1
a236 1
   Expands to: or %rdest, %rarg, %rdest
d241 1
d245 1
a245 1
   Expands to: xor %rdest, %rarg, %rdest
d250 1
d254 1
a254 1
   Expands to: not %rdest, %rdest
d259 1
d264 1
a264 1
   Expands to: rol %rdest, <immed4>, %rdest
d267 1
d272 1
a272 1
   Expands to: ror %rdest, <immed4>, %rdest
d274 1
a274 1
SLA/SLL/SRA/SRL - shift bits in word
d276 2
a277 1
** sla %rsrc, <immed4>, %rdest
d279 1
d283 2
d286 1
a286 2
-- sll <immed4>, %rdest
   Expands to: sla %rdest, <immed4>, %rdest
d288 3
a290 1
** sra %rsrc, <immed4>, %rdest
d295 1
d297 1
a297 1
   Expands to: sra %rdest, <immed4>, %rdest
d300 1
d306 1
a306 1
   Expands to: srl %rdest, <immed4>, %rdest
d312 1
d317 1
d322 1
d327 1
d331 1
d335 1
d341 1
d345 10
d356 6
a361 1
   Expands to: jal %raddr + %0, %rret
d364 3
a366 3
   Expands to: sethi %hi(<symexpr>), %t6
               movb %lo(<symexpr>), %t6
               jal %t6 + %0, %0
d369 1
a369 1
   Expands to: jal %raddr + %roff, %0
d372 6
a377 1
   Expands to: jal %raddr + %0, %0
d380 3
a382 3
   Expands to: sethi %hi(<symexpr>), %t6
               movb %lo(<symexpr>), %t6
               jal %t6 + %0, %ra
d385 1
a385 1
   Expands to: jal %raddr + %roff, %ra
d388 1
a388 1
   Expands to: jal %raddr + %0, %ra
d391 1
a391 1
   Expands to: jal %0 (%ra), %0
d396 1
d399 2
a400 2
   emu or emu--.) See syscall.h for some useful (i.e., implemented)
   interrupts.
d403 1
d410 1
d416 2
a417 2
   Expands to: sub 2, %sp
               mov %rsrc, [%sp + 2]
d420 1
a420 1
   Expands to: add 2, %sp
d423 2
a424 2
   Expands to: mov [%sp + 2], %rdest
               add 2, %sp
d432 1
a432 1
  - 0x followed by hex digits, with optional sign prefix
@


1.12
log
@updated to reflect special-register changes
@
text
@d2 1
a2 1
$Id: opcodes.txt,v 1.11 1999/04/06 04:20:33 bsittler Exp $
d49 1
a49 1
  %7/%r7/%t6: temporary, non-saved
d89 4
d277 5
d288 5
d307 1
a307 1
   emu16.) See syscall.h for some useful (i.e., implemented)
d318 13
@


1.11
log
@Changed register-register MOV to use OR instead of ADD, so it doesn't clobber the flags.
@
text
@d2 1
a2 1
$Id: opcodes.txt,v 1.10 1999/03/31 22:59:37 bsittler Exp $
d105 1
@


1.10
log
@Added RCS Id to the file's header.
@
text
@d2 1
a2 1
$Id$
d90 1
a90 1
   Expands to: add %rsrc, %0, %rdest
@


1.9
log
@Uses new syntax.
@
text
@d2 1
d7 1
a7 1
yet. --BCWS
@


1.8
log
@Updated to reflect instruction set changes.
@
text
@d98 1
a98 1
   Write %rsrc at <offset4> + %raddr.
d104 1
a104 1
   Load the value in special register %ssrc into %rdest.
d106 1
a106 1
** mov %rsrc, %rdest
d108 1
a108 1
   Write the value in %rsrc into special register %rdest.
d110 1
a110 1
SETHI - load high byte
d116 1
a116 1
MOVB - load/store low byte
d124 3
a126 7
CLRC/SETC - clear/set C flag

-- clrc
   Expands to: add %0, %0, %0

** setc
   Sets the C flag.
d154 1
a154 1
CMP/UCMP - compare word
d160 1
a160 1
-- ucmp %rsrc1, %rsrc2
a178 3
** or <symexpr8>, %rdest
   ORs <symexpr8> into the lower half of %rdest.

d211 1
a211 1
SLL/SLA/SRL/SRA - shift bits in word
d213 2
a214 1
** sll %rsrc, <immed4>, %rdest
d218 1
d220 1
a220 7
   Expands to: sll %rdest, <immed4>, %rdest

-- sla %rsrc, <immed4>, %rdest
   Expands to: sll %rsrc, <immed4>, %rdest

-- sla <immed4>, %rdest
   Expands to: sll %rdest, <immed4>, %rdest
d238 1
a238 1
BL/BGE/BE/BNE/BG/B - conditional and unconditional short branch
d241 1
d245 1
d249 1
d253 1
d262 1
a262 1
JAL/J/CALL/RET - long jump
d286 1
a286 1
INT - trap
a292 2

IRET - return from trap or interrupt
@


1.7
log
@Added a few comments about signedness.
@
text
@d32 4
a35 6
    - 0x00e0: [mask] conditions set by cmp:
      0x0080: "less than" condition (LT)
      0x0040: "equal to" condition (EQ)
      0x0020: "greater than" condition (GT)
    - 0x0010: "carry" flag (C)
    - 0x000f: [mask] reserved for future use
d58 1
a58 1
- By convention, scalar return values of 4 words or less are returned in
d63 1
a63 1
- By convention, arguments of more than 1 word are passed by reference
d65 1
a65 1
  are passed on the stack in the caller's frame, with the first
d86 1
a86 6
** add %rsrc, %rarg, %rdest
   Place the sum of the values in %rsrc and %rarg in %rdest.
   Affects the C flag.

-- add %rarg, %rdest
   Expands to: add %rdest, %rarg, %rdest
d91 35
d132 9
d143 3
a145 1
   Affects the C flag. Treats operands as unsigned.
d149 1
a149 1
   Affects the C flag. Treats operands as unsigned.
d156 12
a167 1
   Affects the C flag. The <immed4> is unsigned.
d175 1
a175 5
** xor %rsrc, %rarg, %rdest
   Place the bitwise XOR of the values in %rsrc and %rarg in %rdest.

-- xor %rarg, %rdest
   Expands to: xor %rdest, %rarg, %rdest
d186 9
a194 3
** sethi <symexpr8>, %rdest
   Loads <symexpr8> into the upper half of %rdest.
   Clears the lower half of %rdest.
d202 2
d206 1
a206 1
   Affects the C flag.
d213 1
a213 1
   Affects the C flag.
d218 2
d222 1
a222 1
   Affects the C flag.
d236 1
a236 1
   Affects the C flag.
d244 1
a244 1
   Affects the C flag.
d249 1
a249 3
** jal [%raddr + %roff], %rret
   Jump to the address %raddr + %roff, placing the address of the
   instruction which would have been executed next in %rret.
d251 2
a252 2
-- jal [%raddr], %rret
   Expands to: jal [%raddr + %0], %rret
d254 2
a255 2
-- j [%raddr + %roff]
   Expands to: jal [%raddr + %roff], %0
d257 2
a258 2
-- j [%raddr]
   Expands to: jal [%raddr + %0], %0
d260 2
a261 2
-- call [%raddr + %roff]
   Expands to: jal [%raddr + %roff], %ra
d263 2
a264 2
-- call [%raddr]
   Expands to: jal [%raddr + %0], %ra
d266 2
a267 2
-- ret
   Expands to: jal %0 (%ra), %0
d269 1
a269 2
** ld [%raddr + <offset4>], %rdest
   Load the word starting at <offset4> + %raddr into %rdest.
d271 3
a273 2
-- ld [%raddr], %rdest
   Expands to: ld [%raddr + 0], %rdest
d275 2
a276 2
** st %rsrc, [%raddr + <offset4>]
   Write %rsrc at <offset4> + %raddr.
d278 2
a279 2
-- st %rsrc, [%raddr]
   Expands to: st %rsrc, [%raddr + 0]
d281 2
a282 3
** cmp %rsrc1, %rsrc2
   Compare %rsrc1 and %rsrc2, set the comparison flags in %ps.
   Treats operands as signed.
d284 2
a285 2
** ldb [%raddr], %rdest
   Load the byte at address %raddr into the low half of %rdest.
d287 2
a288 2
** stb %rsrc, [%raddr]
   Store the low half of %rsrc at the address %raddr.
d290 2
a291 21
** rd %ssrc, %rdest
   Load the value in special register %ssrc into %rdest.

** wr %rsrc, %rdest
   [supervisor mode only]
   Write the value in %rsrc into special register %rdest.

** bc <symexpr>
   Branch to <symexpr> if the C flag is set in %ps.

** be <symexpr>
   Branch to <symexpr> if the EQ flag is set in %ps.

** bne <symexpr>
   Branch to <symexpr> if the EQ flag is not set in %ps.

** bl <symexpr>
   Branch to <symexpr> if the LT flag is set in %ps.

** bg <symexpr>
   Branch to <symexpr> if the GT flag is set in %ps.
d293 1
a293 2
** b <symexpr>
   Branch to <symexpr> unconditionally.
d301 1
a301 2
** nop
   No effect.
d307 5
d323 1
a323 1
  - .
d333 3
a335 3
- b, blt, beq, bne and bgt have a limited range, since they use
  signed, doubled 8-bit displacements from the instruction following
  the branch
@


1.6
log
@Changed syntax a little. The calling convention is a little closer to what I'd like now.
@
text
@d106 1
a106 1
   Affects the C flag.
d110 1
a110 1
   Affects the C flag.
d117 1
a117 1
   Affects the C flag.
d229 1
@


1.5
log
@Changed to reflect syntax change, making as16 more SPARC-like.
@
text
@d37 1
a37 1
    - 0x001f: [mask] reserved for future use
d60 2
a61 2
- By convention, return values of 4 words or less are returned in
  %a0.. %a3, and larger values are returned by having the caller pass the
d63 1
a63 1
  argument. *This address is preserved by the callee.*
@


1.4
log
@Changed to reflect new implementation of C ("carry") flag.
@
text
@d98 1
a98 1
-- cc
d101 1
a101 1
** sc
d104 4
d115 1
a115 5
** addi <immed4>, %rdest
   Increment %rdest by <immed4>.
   Affects the C flag.

** subi <immed4>, %rdest
d125 6
d137 2
a138 2
** xor %rsrc, %rarg, %rdest
   Place the bitwise XOR of the values in %rsrc and %rarg in %rdest.
d140 3
a142 2
-- xor %rarg, %rdest
   Expands to: xor %rdest, %rarg, %rdest
d164 1
a164 1
** sl %rsrc, <immed4>, %rdest
d168 2
a169 2
-- sl <immed4>, %rdest
   Expands to: sl %rdest, <immed4>, %rdest
d172 1
a172 1
   Expands to: sl %rsrc, <immed4>, %rdest
d175 1
a175 1
   Expands to: sl %rdest, <immed4>, %rdest
d185 1
a185 1
** sr %rsrc, <immed4>, %rdest
d190 2
a191 2
-- sr <immed4>, %rdest
   Expands to: sr %rdest, <immed4>, %rdest
d193 1
a193 1
** jal %roff (%raddr), %rret
d197 2
a198 2
-- jal (%raddr), %rret
   Expands to: jal %0 (%raddr), %rret
d200 2
a201 2
-- j %roff (%raddr)
   Expands to: jal %roff (%raddr), %0
d203 2
a204 2
-- j (%raddr)
   Expands to: jal %0 (%raddr), %0
d206 2
a207 2
-- call %roff (%raddr)
   Expands to: jal %roff (%raddr), %ra
d209 2
a210 2
-- call (%raddr)
   Expands to: jal %0 (%raddr), %ra
d215 1
a215 1
** lw <offset4> (%raddr), %rdest
d218 2
a219 2
-- lw (%raddr), %rdest
   Expands to: lw 0 (%raddr), %rdest
d221 1
a221 1
** sw %rsrc, <offset4> (%raddr)
d224 2
a225 2
-- sw %rsrc, (%raddr)
   Expands to: sw %rsrc, 0 (%raddr)
d230 1
a230 1
** lb (%raddr), %rdest
d233 1
a233 1
** sb %rsrc, (%raddr)
d236 1
a236 7
** lli <symexpr8>, %rdest
   Load <symexpr8> into the low half of %rdest.

** lhi <symexpr8>, %rdest
   Load <symexpr8> into the upper half of %rdest.

** ls %ssrc, %rdest
d239 2
a240 1
** ss %rsrc, %rdest [supervisor mode only]
d246 1
a246 1
** beq <symexpr>
d252 1
a252 1
** blt <symexpr>
d255 1
a255 1
** bgt <symexpr>
d270 2
a271 1
** iret [supervisor mode only]
@


1.3
log
@Added a bc (branch on carry) instruction.
Added a "carry" (C) bit to %ps.
@
text
@d36 1
a36 1
    - 0x0010: "carry" flag (C) (not yet...)
d51 4
a54 4
  %8/%r8/%a0: argument 0/return value, non-saved
  %9/%r9/%a1: argument 1, non-saved
  %10/%r10/%a2: argument 2, non-saved
  %11/%r11/%a3: argument 3, non-saved
d60 11
a70 1
  Saved means a function should return the register to its
d90 1
d98 1
a98 1
-- nop
d101 3
d106 1
d113 1
d117 1
d144 2
a145 1
   Place %rsrc in %rdest, and rotate it left by <immed4> bits.
d151 2
a152 1
   Place %rsrc in %rdest, and rotate it right by <immed4> bits.
d159 1
d173 1
d181 1
d265 3
d274 5
a278 1

@


1.2
log
@Renamed smoke16{as,ld,emu,sim{} to {as,ld,emu,aim}sim}16
Renamed libsmoke16obj to libobj16
@
text
@d36 1
d218 3
@


1.1
log
@Initial revision
@
text
@d236 1
a236 1
   smoke16emu.) See syscall.h for some useful (i.e., implemented)
@
