NOTE: Working Register means one of the 16 registers(0 to F), selected by the Register Pointer RP.
NOTE: When a Register is accessed direct, it can have a number from $00 to $FF, (0-255).
Detailed info LD
Instruction Format:
OPC Address Mode
Cycles (hex) dst src
---------------------------
6 rC r IM
6 r8 r R
6 r9 R* r
6 E3 r Ir
6 F3 Ir r
10 E4 R R
10 E5 R IR
10 E6 R IM
10 E7 IR IM
10 F5 IR R
10 C7 r X
10 D7 X r
r is 0 to FR is 00 to FF
Operation: dst <-- src
The contest of the source operand are loaded into the destination operand. The contents of the source operand are not affected.
Flags:
- C: Unaffected.
- Z: Unaffected.
- S: Unaffected.
- V: Unaffected.
- D: Unaffected.
- H: Unaffected.
- Z: Unaffected.
Note:
Address modes R or IR can be used to specify a 4-bit Working Register. In this format, the
source or destination Working Register operand is specified by adding 1110B(Eh) to the
high nibble of the operand. For example, if Working Register R12(Ch) is the destination operand,
then ECh will be used as the destination operand in the OpCode.
Example: The statement:
ASM: LD R15,#34H
OBJ: FC 34
Loads the value 34H into working register R15.
Example: If register 34H contains the value FCH, the statement:
ASM: LD R14,34H
OBJ: F8 34
Loads the value FCH into working register R15. The contents of register 34H are not affected.
Example: If working register R14 contains the value 45H, the statement:
ASM: LD 34H,R14
OBJ: E9 34
Loads the value 45H into register 34H. The contents of working register R14 are not affected.
Example: If working register R12 contains the value 34H, and Register 34H contains the value FFH, the statement:
ASM: LD R13,@R12
OBJ: E3 DC
Loads the value FFH into working register R13. The contents of working register R12 and R34 are not affected.
Example: If working register R13 contains the value 45h, and working Register R12 contains the value 00h, the statement:
ASM: LD @R13,R12
OBJ: F3 DC
Loads the value 00h into register 45h. The contents of working register R12 and R13 are not affected.
Example: If register 45h contains the value CFh, the statement:
ASM: LD 34H,45H
OBJ: E4 45 34
Loads the value CFh into register 34h. The contents of working register 45h are not affected.
Example: If register 45h contains the value CFh, and register contains the value FFh, the statement:
ASM: LD 34H,@45H
OBJ: E5 45 34
Loads the value FFh into register 34h. The contents of register 45h and CFh are not affected.
Example: The statement:
ASM: LD 34H,#A4H
OBJ: E6 34 A4
Loads the value A4h into register 34h.
Example: If working register R14 contains the value 7Fh, the statement:
ASM: LD @R14,#FCH
OBJ: E7 EE FC
Loads the value FCh into register 7Fh. The contents of working register R14 are not affected.
Example: If register 34h contains the value CFh, and Register 45h contains the value FFh, the statement:
ASM: LD @34H,45H
OBJ: F5 45 34
Loads the value FFh into register CFh. The contents of register 34h and 45h are not affected.
Example: If working register R0 contains the value 08h, and Register 2Ch (24h + 08h = 2Ch) contains the value 4Fh, the statement:
ASM: LD R10,24H(R0)
OBJ: C7 A0 24
Loads working register R10 with the value 4Fh. The contents ofworking register R0 and register 2Ch are not affected.
Example: If working register R0 contains the value 0Bh, and working Register R10 contains 83h, the statement:
ASM: LD F0H(R0),R10
OBJ: D7 A0 F0
Loads the value 83h into register FBh (F0h + 0Bh = FBh). Since this is the interrupt mask register, the LOAD statement has the effect of enabligg IRQ0 and IRQ1. The contents of working registers R0 and R10 are unaffected by this load.
Detailed info LDC
Instruction Format:
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