The conventional approach of computer hardware (Von Neumann/Parallel processing) along with Operating System and Application Software will not be sufficient to cater to the information load requirements of IT applications in the twenty first century. The primarily reasons are as follows:

• Unlike electronic data processing applications in the past decades, the future systems will require computers with capabilities to handle imprecise and partial information, approximate reasoning, learning etc. both for scientific and commercial applications.

• For Cognitive applications, the MIPS (Million Instructions Per Second) rating for benchmarking computing hardware is slowly being replaced with FLIPS (Fuzzy Logic Inferences Per Second). IT for Masses in multilingual Cybercitizens and similar complex application in the 21^st century will be heavily dependent on high MIQ hardware to provide better cognitive load sharing between hardware and software.

• Operating Systems shall be an integrated extension of computer hardware, to provide intelligent solutions to improve Machine Intelligent Quotient (MIQ) of the building blocks of the systems needed for IT environment. This will call for change in the thinking amongst the OS developers. Thus on the lines of RISC philosophy for microprocessors, OS will shed off some of its existing burden away to hardware.

• Electronic Governance and Information Disposal arising out of this will open up new issues like weeding of information records in the context of Ecological Aspects of IT Revolution (Text, Graphics, Image, video Clips, movies, audio sounds etc.). The situation is different that the delete commands of OS or the data compression methods for data storage and retrieval. The cognitive aspects of raw data, processed data, raw information and processed intelligent information will occupy significant considerations.
• Multilingual Optical Keyboards will be deployed in the near future while introducing the IT for masses.

Developments in the microelectronics field in the past increased the level of integration of transistors on the chip. The focus on VLSI Hardware development using Application Specific Processor Architecture (ASPA) in place of Application Specific Integrated Circuits (ASIC) will need to strengthened further.

The von Neumann model of general purpose computing in the Stored Program Computer will undergo change. The problem of information (instructions and data) flowing back and forth to the processor and memory through a single channel of finite bandwidth has been viewed as a bottleneck when it comes to in-chip 'functions programming'. This leads to introduction of programmable architectures instead of a fixed architecture (of von-Neumann style of computing) to be implemented in the form of digital structures on silicon. The Instruction Sets (with opcode and operands) were either hardwired or microprogrammed. This made the hardware integrated circuits 'dumb' ; and introduced the assembly approach in electronic hardware design. There was no possibility of dynamically changing the Instruction Set itself. But the FPGA route of designing some small scale fuzzy logic applications had helped to simulate an deplore the dynamic loading of FPGA in the form of Instruction Set on the FPGA - leading to overcome the limitations of hardwired or microprogrammed fixed Instruction Set approach. The simulation results are motivating to explore the possibilities of experimenting 'in-silicon' dynamic configuration of Instruction Set, and Reconfigurable architectures. The lack of ready made tools for ASPA design made the job difficult. The research efforts for 'CAD software of ASPA ' did not generate much response amongst the professionals. However, it is felt that these 'mind-set' will soon change. This is what exactly happened in the past when Prof. Zadeh introduced Fuzzy Set and Fuzzy Logic. Object Oriented Architectures or simple architectures with more resources ( registers, Content Address Memory, On-Chip associated cache memory, etc.) are the transition phase technological issues.

• for fuzzy logic hardware for second generation Fuzzy Logic Systems to appear in the first two decades of Twenty First Century.

• In this context, the VHDL based design approach coupled with Field Programmable Gate Array(FPGA) technology has simplified the in-circuit chip performance evaluation in prototyping new hardware. Thus reconfigurable hardware by downloading the instructions in FPGA has been the motivation for ASPA methodology development. For example, Vector Architectures using Vector-Vector Instructions and Vector-Memory Instructions (needed in Fuzzy Logic ) to be implemented as functional ipelines as programmable architecture feature rather than hardwired/microprogrammed approaches towards instruction set architectures of the yesteryears.

As a result of multifold developments in various fields of computer hardware, software and communication , allied areas of science, engineering, technology, the focus will be on "isolated versus integrated" approach. Soft computing will be further evolved to utilizeVirtual Fab (a popular future methodology in the semiconductor microelectronic industry) permitting foundry operations as a seamless extension of its customer's business. The primary advantages of Virtual Fab are

•  Benefit of customer's internal fab in confidentiality and flexibility  in responsiveness.
• Allow designers to leverage their proprietary technology by reducing time-to-market for system-on-chip with higher MIQ.
• Intellectual Property (IP) cores provide standard functions (not to be confused with the Standard Cell Libraries of VLSI CAD vendors), often already supported by application software, enabling the design team to quickly introduce value added solutions with their proprietary technology.