In a message dated 31/01/98  12:46:50, you write:

> 1. I have some books which talk about how instructions behave when M/X=1 
>  (8-bit stuff) or when M/X=0 (16-bit stuff).  What happens when M=1 and 
>  X=0?? And what happens when M=0 and X=1?

M = size of Accumulator or Memory data (except index values)
X = size of Index register data

>  2. When M/X are changed, does the actual length of operands change?
>  For example:  ADC #5
>  Would the CPU read two bytes when M=X=1 and three bytes when M=X=0?

It would read 2 when M=1,3 when M=0. ADC is not dependent on X. An
instruction such as LDX immediate would depend on X

>  Another example: LDA ($80)
>  Would the CPU read two bytes ($80) when M=X=1 (PC+=2) and three bytes 
>  ($0080) when M=X=0 (PC+=3)?  No, that can't be right... WHAT'S THE DEAL 
>  HERE?  And how does an assembler decide what to output?

Two ways... either a directive sets up the current 'state' or by use of .w and
.b
identifiers e.g. lda.w lda.b
  
>  3. In 100 words or less, please summarize the difference between Native 
>  Mode with M/X=1, and Emulation mode.

Not a clue. AFAIK no SNES code uses Emulation mode. There are a few
basic things- the vectors are wrong, the Stack pointer is always at 01xx etc.
  
>  4. Why does the GTE documentation state:
>  "Words, arrays, records, or any data structures may span 64K byte bank
>  boundaries with no compromise in code efficiency."
>  Does this mean that, whenever values are added to or subracted from X, 
>  Y, or A, the DBR register is automatically adjusted?  If not, what DOES 
>  it mean?

When an address is X or Y indexed, this is a 'full' addition.
  
>  6. How should the execution of SPC700 and 65c816 instructions be 
>  interleaved?

Any way you like... do some of one, then some of another.

Paul Robson (autismuk@aol.com)