as12 (v1.2) absolute assembler for the Motorola CPU12 Executed: Fri Feb 26 01:16:49 1999 ; ; Juha Niinikoski 12.2.1999 ; GM ALDL bus display v1.0 ; operates on Motorola HC12A4 processor ; I/O routines added 13.2.1999 ; fault finding 19.2.1999 ; diag display indexes corrected 20.2.1999 ; checksum logic found & added 21.2.1999 ; some timing problems corrected, found more ; parameter indexes, selector knob IRQ routines added, ; more display stuff 22.2.1999 v1.1 ; TCC slip parameter found 26.2.1999 ; ; Memory Map Equates 0800 RAMSTART: EQU $0800 ; start of internal ram 0bff RAMEND : EQU $0BFF ; END of internal ram ; 0bff STACK: EQU RAMEND ; top of stack ; f000 ROMBS: EQU $F000 ; start of rom ; #include equates.asm ; include register equates ;********************************************************************** ;* MOTOROLA * ;* Motorola Technical Training - MC68HC12 Course * ;* Phoenix, Arizona * ;* * ;* Title: EQUATES.ASM * ;* ------ * ;* * ;* * ;* Creation Date: April 24, 1996 From: NEW * ;* * ;* * ;* Author: Norbel Navarro * ;* * ;* Description: * ;* ------------ * ;* Equates Register File for MC68HC12A4 * ;* Added some B32 registers on 6/24/98 RDF. ?>NK-hJ´—ˇHŹ~ˇH€,\,-LALDL ;* * ;********************************************************************** ;*Motorola reserves the right to make changes without further notice * ;*to any product herein. Motorola makes no warranty, representation or* ;*guarantee regarding the suitability of its products for any parti- * ;*cular purpose, nor does Motorola assume any liability arising out of* ;*the application or use of any product or circuit, and specifically * ;*disclaims any and all liability, including without limitation conse-* ;*quential or incidental damages. "Typical" parameters can and do vary* ;*in different applications. All operating parameters, including * ;*"Typical",must be validated for each customer application by * ;*customer's technical experts. Motorola does not convey any license * ;*under its patent rights nor the rights of others. Motorola products* ;*are not designed, intended, or authorized for use as components in * ;*systems intended for surgical implant into the body, or other applic* ;*ations intended to support or sustain life, or for any other applic-* ;*ation in which the failure of the Motorola product could create a * ;*situation where injury or death may occur. Should Buyer purchase or * ;*use Motorola products for any such unintended or unauthorized applic* ;*ation, Buyer, shall indemnify and hold Motorola and its officers, * ;*employees, subsidiaries, affiliates, and distributors harmless * ;*against all claims, costs, damages, and expenses, and reasonable * ;*attorney fees arising out of, directly or indirectly, any claim of * ;*personal injury or death associated with such unintended or unauthor* ;*ized use, even if such claim alleges that Motorola was negligent * ;*regarding the design or manufacture of the part. * T>N`-hJ´—ˇHŹ~ˇH€,\,-LALDL ;*Motorola and the Motorola logo are registered trademarks of * ;*Motorola Inc. * ;*Motorola is an Equal Opportunity/Affirmative Action Employer. * ;*Copyright Motorola Inc. 1996 * ****** ;**** Parallel I/O Port Registers ********** 0000 PORTA: equ $00 ;Port A Data Register 0001 PORTB: equ $01 ;Port B Data Register 0002 DDRA: equ $02 ;Port A Data Direction Register 0003 DDRB: equ $03 ;Port B Data Direction Register 0004 PORTC: equ $04 ;Port C Data Register 0006 DDRC: equ $06 ;Port C Data Direction Register 0008 PORTE: equ $08 ;Port E Data Register 0009 DDRE: equ $09 ;Port E Data Direction Register 000a PEAR: equ $0A ;Port E Assigment Register 000b MODE: equ $0B ;Mode Register 000c PUCR: equ $0C ;Pull Up Control Register 000d RDRIV: equ $0D ;Reduced Drive of I/O Lines Register 0010 INITRM: equ $10 ;Initialization of Internal RAM Position Register 0011 INITRG: equ $11 ;Initialization of Internal Register Position Register 0012 INITEE: equ $12 ;Initialization of Internal EEPROM Position Register 0013 MISC: equ $13 ;Miscellaneous Mapping Control Register ;**** Real Time Clock Registers ******** 0014 RTICTL: equ $14 ;Real Time Interrupt Control Register 0015 RTIFLG: equ $15 ;Real Time Interrupt Flag Register ;**** COP Watchdog Timer Registers ******** 0016 COPCTL: equ $16 ;COP Control Register 0017 COPRST: equ $17 ;Arm/Reset COP Timer register 0018 ITST0: equ $18 ; 0019 ITST1: equ $19 ; 001a ITST2: equ $1A ; 001b ITST3: equ $1B ; ;**** Resets and Interrupts Registers ******** 001e INTCR: equ $1E ;Interrupt Control Register 001f HPRIO: equ $1F ;Highest Priority Interrupt Register ;**** Key Wakeup Registers ******** 0005 PORTD: equ $05 ;Port D Data Register 0007 DDRD: equ $07 ;Port D Data Direction Register ;*** Note: 20 - 25 dual mapped with B32 breakpoint registers 0020 KWIED: equ $20 ;Key Wakeup Port D Interrupt Enable Register 0021 KWIFD: equ $21 ;Key Wakeup Port D Flag Register 0024 PORTH: equ $24 ;Port H Data Register 0025 DDRH: equ $25 ;Port H Data Direction Register 0026 KWIEH: equ $26 ;Key Wakeup Port H Interrupt Enable Register 0027 KWIFH: equ $27 ;Key Wakeup Port H Flag Register 0028 PORTJ: equ $28 ;Port J Data Register 0029 DDRJ: equ $29 ;Port J Data Direction Register 002a KWIEJ: equ $2A ;Key Wakeup Port J Interrupt Enable Register 002b KWIFJ: equ $2B ;Key Wakeup Port J Flag Register 002c KPOLJ: equ $2C ;Key Wakeup Port J Polarity Register 002d PUPSJ: equ $2D ;Key Wakeup Port J Pull-up / Pull-down Select Register 002e PULEJ: equ $2E ;Key Wakeup Port J Pull-up / Pull-down Enable Register ;**** Memory Expansion Registers ******** 0030 PORTF: equ $30 ;Port F Data Register 0031 PORTG: equ $31 ;Port G Data Register 0032 DDRF: equ $32 ;Port F Data Direction Register 0033 DDRG: equ $33 ;Port G Data Direction Register 0034 DPAGE: equ $34 ;Data Page Register 0035 PPAGE: equ $35 ;Program Page Register 0036 EPAGE: equ $36 ;Extra Page Register 0037 WINDEF: equ $37 ;Window Definition Register 0038 MXAR: equ $38 ;Memory Expansion Assignment Register ;**** Chip Select Registers ******** 003c CSCTL0: equ $3C ;Chip Select Control Register 0 003d CSCTL1: equ $3D ;Chip Select Control Register 1 003e CSSTR0: equ $3E ;Chip Select Stretch Register 0 003f CSSTR1: equ $3F ;Chip Select Stretch Register 1 ;**** Phase Lock Loop Registers ******** ;**** Note: 40 - 47 dual Mapped with B32 PWM output registers 0040 LDVH: equ $40 ;Loop Divider Register High 0041 LDVL: equ $41 ;Loop Divider Register Low 0042 RDVH: equ $42 ;Reference Divider Register High 0043 RVDL: equ $43 ;Reference Divider Register Low 0047 CLKCTL: equ $47 ;Clock Control Register ;*** B32 PWM Registers (some) ****** 0054 PWCTL: equ $54 ; PWM Control Register 0056 PORTP: equ $56 ; Port P Data Register 0057 DDRP: equ $57 ; Port P data direction ;**** Analog to Digital Converter Registers ******** 0060 ATDCTL0: equ $60 ;Reserved 0061 ATDCTL1: equ $61 ;Reserved 0062 ATDCTL2: equ $62 ;ATD Control Register 2 0063 ATDCTL3: equ $63 ;ATD Control Register 3 0064 ATDCTL4: equ $64 ;ATD Control Register 4 0065 ATDCTL5: equ $65 ;ATD Control Register 5 0066 ATDSTATH: equ $66 ;ATD Status Register High 0067 ATDSTATL: equ $67 ;ATD Status Register Low 0068 ATDTESTH: equ $68 ;ATD Test Register High 0069 ATDTESTL: equ $69 ;ATD Test Register Low 006f PORTAD: equ $6F ;Port AD Data Input Register 0070 ADR0H: equ $70 ;A/D Converter Result Register 0 0072 ADR1H: equ $72 ;A/D Converter Result Register 1 0074 ADR2H: equ $74 ;A/D Converter Result Register 2 0076 ADR3H: equ $76 ;A/D Converter Result Register 3 0078 ADR4H: equ $78 ;A/D Converter Result Register 4 007a ADR5H: equ $7A ;A/D Converter Result Register 5 007c ADR6H: equ $7C ;A/D Converter Result Register 6 007e ADR7H: equ $7E ;A/D Converter Result Register 7 ;**** Standard Timer Module Registers ******** 0080 TIOS: equ $80 ;Timer Input Capture / Output Compare Select 0081 CFORC: equ $81 ;Timer Compare Force Register 0082 OC7M: equ $82 ;Output Compare 7 Mask Register 0083 OC7D: equ $83 ;Output Compare 7 Data Register 0084 TCNTH: equ $84 ;Timer Counter Register Hi $84 0085 TCNTL: equ $85 ;Timer Counter Register Lo $85 0086 TSCR: equ $86 ;Timer System Control Register $86 0087 TQCR: equ $87 ;Reserved 0088 TCTL1: equ $88 ;Timer Control Register 1 0089 TCTL2: equ $89 ;Timer Control Register 2 008a TCTL3: equ $8A ;Timer Control Register 3 008b TCTL4: equ $8B ;Timer Control Register 4 008c TMSK1: equ $8C ;Timer Interrupt Mask Register 1 008d TMSK2: equ $8D ;Timer Interrupt Mask Register 2 008e TFLG1: equ $8E ;Timer Interrupt Flag Register 1 008f TFLG2: equ $8F ;Timer Interrupt Flag Register 2 0090 TC0H: equ $90 ;Timer Input Capture / Output Compare Register 0 Hi $90 0091 TC0L: equ $91 ;Timer Input Capture / Output Compare Register 0 Lo $91 0092 TC1H: equ $92 ;Timer Input Capture / Output Compare Register 1 Hi $92 0093 TC1L: equ $93 ;Timer Input Capture / Output Compare Register 1 Lo $93 0094 TC2H: equ $94 ;Timer Input Capture / Output Compare Register 2 Hi $94 0095 TC2L: equ $95 ;Timer Input Capture / Output Compare Register 2 Lo $95 0096 TC3H: equ $96 ;Timer Input Capture / Output Compare Register 3 Hi $96 0097 TC3L: equ $97 ;Timer Input Capture / Output Compare Register 3 Lo $97 0098 TC4H: equ $98 ;Timer Input Capture / Output Compare Register 4 Hi $98 0099 TC4L: equ $99 ;Timer Input Capture / Output Compare Register 4 Lo $99 009a TC5H: equ $9A ;Timer Input Capture / Output Compare Register 5 Hi $9A 009b TC5L: equ $9B ;Timer Input Capture / Output Compare Register 5 Lo $9B 009c TC6H: equ $9C ;Timer Input Capture / Output Compare Register 6 Hi $9C 009d TC6L: equ $9D ;Timer Input Capture / Output Compare Register 6 Lo $9D 009e TC7H: equ $9E ;Timer Input Capture / Output Compare Register 7 Hi $9E 009f TC7L: equ $9F ;Timer Input Capture / Output Compare Register 7 Lo $9F 00a0 PACTL: equ $A0 ;Pulse Accumulator Control Register 00a1 PAFLG: equ $A1 ;Pulse Accumulator Flag Register 00a2 PACNTH: equ $A2 ;Pulse Accumulator Count Register High 00a3 PACNTL: equ $A3 ;Pulse Accumulator Counter Register Low 00ad TIMTST: equ $AD ;Timer Test Register 00ae PORTT: equ $AE ;Timer Port T Data Register 00af DDRT: equ $AF ;Timer Port T Data Direction Register ;**** Serial Communication (SCI & SPI) Registers ********* 00c0 SC0BDH: equ $C0 ;SCI 0 Baud Rate Register High 00c1 SC0BDL: equ $C1 ;SCI 0 Baud Rate Register Low 00c2 SC0CR1: equ $C2 ;SCI 0 Control Register 1 00c3 SC0CR2: equ $C3 ;SCI 0 Control Register 2 00c4 SC0SR1: equ $C4 ;SCI 0 Status Register 1 00c5 SC0SR2: equ $C5 ;SCI 0 Status Register 2 00c6 SC0DRH: equ $C6 ;SCI 0 Data Register High 00c7 SC0DRL: equ $C7 ;SCI 0 Data Register Low 00c8 SC1BDH: equ $C8 ;SCI 1 Baud Rate Register High 00c9 SC1BDL: equ $C9 ;SCI 1 Baud Rate Register Low 00ca SC1CR1: equ $CA ;SCI 1 Control Register 1 00cb SC1CR2: equ $CB ;SCI 1 Control Register 2 00cc SC1SR1: equ $CC ;SCI 1 Status Register 1 00cd SC1SR2: equ $CD ;SCI 1 Status Register 2 00ce SC1DRH: equ $CE ;SCI 1 Data Register High 00cf SC1DRL: equ $CF ;SCI 1 Data Register Low 00d0 SP0CR1: equ $D0 ;SPI 0 Control Register 1 00d1 SP0CR2: equ $D1 ;SPI 0 Control Register 2 00d2 SP0BR: equ $D2 ;SPI 0 Baud Rate Register 00d3 SP0SR: equ $D3 ;SPI 0 Status Register 00d5 SP0DR: equ $D5 ;SPI 0 Data Register 00d6 PORTS: equ $D6 ;Port S Data Register 00d7 DDRS: equ $D7 ;Port S Data Direction Register ;**** EEPROM Register ******** 00f0 EEMCR: equ $F0 ;EEPROM Module Configuration Register 00f1 EEPROT: equ $F1 ;EEPROM Block Protect 00f2 EETST: equ $F2 ;EEPROM Test Register 00f3 EEPROG: equ $F3 ;EEPROM Control Register ; ; Ram variables ; 0800 ORG RAMSTART ; ; capture buffer start ; 0800 57 BUFL: FCB #BUFFE-#BUFFER+1 ; 0801 01 BUFFER: FCB $01 ;#0 0802 00 FCB $00 ;#1 ; 0803 00 FCB $00 ;#2 Fault code bits 0804 00 FCB $00 0805 00 FCB $00 ;#4 0806 00 FCB $00 0807 00 FCB $00 0808 00 FCB $00 0809 00 FCB $00 080a 00 FCB $00 ;#9 080b 00 FCB $00 ;#10 080c 00 FCB $00 080d 00 FCB $00 080e 00 FCB $00 080f 00 FCB $00 ;#14 0810 00 FCB $00 ;#15 0811 00 FCB $00 0812 00 FCB $00 0813 00 FCB $00 ; 0814 04 FCB $04 ;#19 ? ; 0815 12 TB: FCB $12 ;#20 Throttle % ; 0816 12 FCB $12 ;#21 (throttle 3758uplicate ?) ; 0817 83 FCB $83 ;#22 ; 0818 47 TTEMP: FCB $47 ;#23 Trans Temp ; 0819 14 ERPM: FCB $14 ;#24 RPM Engine 081a c9 FCB $C9 ;#25 ; 081b 15 IRPM: FCB $15 ;#26 RPM Input ? 081c e4 FCB $E4 ;#27 ; 081d 15 TRPM: FCB $15 ;#28 RPM Turbine ? 081e 5f FCB $5F ;#39 ; SPEED: ; is this speed or ?? 081f 00 ORPM: FCB $00 ;#30 RPM Output 0820 00 FCB $00 ;#31 ; 0821 00 FCB $00 ;#32 0822 19 FCB $19 ;#33 0823 2b FCB $2B ;#34 0824 2a FCB $2A ;#35 0825 00 FCB $00 ;#36 0826 40 FCB $40 ;#37 0827 89 BATT: FCB $89 ;#38 Battery voltage 0828 00 FCB $00 ;#39 ; 0829 00 FCB $00 ;#40 Vechicle speed ? ; 082a ff FCB $FF ;#41 Torque sig (PSI) ; 082b ff FCB $FF ;#42 PCS DES Amp (V) ; 082c ff FCB $FF ;#43 Press ctrl amp (V) ; 082d ff FCB $FF ;#44 ;14 082e 37 FCB $37 ;#45 ;36 ;37 082f 14 FCB $14 ;#46 ; 0830 00 CGEAR: FCB $00 ;#47 Current Gear ? ; TCC Duty cycle ? 0831 40 FCB $40 ;#48 0832 60 FCB $60 ;#49 0833 48 FCB $48 ;#50 0834 00 FCB $00 ;#51 0835 00 FCB $00 ;#52 0836 00 FCB $00 ;#53 0837 00 FCB $00 ;#54 0838 01 FCB $01 ;#55 0839 f8 FCB $F8 ;#56 083a ff FCB $FF ;#57 083b 00 FCB $00 ;#58 083c 00 FCB $00 ;#59 083d 1e FCB $1E ;#60 083e 00 FCB $00 ;#61 ; 083f fc TCCSL: FCB $FC ;#62 TCC slip (RPM) 0840 d5 FCB $D5 ;#63 ; 0841 9e FCB $9E ;#64 0842 9e FCB $9E ;#65 0843 00 FCB $00 ;#66 0844 08 FCB $08 ;#67 0845 01 FCB $01 ;#68 0846 06 FCB $06 ;#69 0847 26 FCB $26 ;#70 0848 01 FCB $01 ;#71 0849 00 FCB $00 ;#72 ; 084a 02 FCB $02 ;#73 Shift fail ? 084b 10 FCB $10 ;#74 1-2 Shift (sec) ? 084c 20 FCB $20 ;#75 2-3 084d 40 FCB $40 ;#76 3-4 ; 084e 00 FCB $00 ;#77 084f 00 FCB $00 ;#78 0850 00 FCB $00 ;#79 0851 1c FCB $1C ;#80 0852 c4 FCB $C4 ;#81 ; 0853 23 PROMID: FCB $23 ;#82 Prom ID 9189 = 23E5h 0854 e5 FCB $E5 ;#83 ; 0855 19 BBITS: FCB $19 ;#84 0080 BREQ EQU %10000000 ; BRAKE REQUEST = 1 0040 ACREQ EQU %01000000 ; AC REQUEST = 1 ; 0856 b7 PRBIT: FCB $B7 ;#85 0020 BRAKE EQU %00100000 ; BRAKE APPLIED = 0 0040 ACON EQU %01000000 ; AC ON = 1 001c PRNMASK EQU %00011100 ; 0857 b1 BUFFE: FCB $B1 ;#86 Frame Checksum byte ; 0858 00 FCB $0 ;________________________________ ; 0859 BUFNDX RMB 2 ; CAPTURE BUFFER INDEX 085b DLYCTR RMB 2 ; DELAY COUNTER N*100YS 085d TEMP RMB 1 ; GENERAL TEMP STORAGE 085e CSUM RMB 1 ; CHECK SUM 085f OB RMB 1 ; BINARY OUTPUT WORKING REG 0860 OBCTR RMB 1 ;____________________________________ 0861 OCH RMB 1 ; OUTPUT CHANEL SELECTOR ; 0=RS232, 1=ALDL, 2=LCD1, 3=LCD2 0000 RS232 EQU 0 0001 ALDL EQU 1 0002 LCD1 EQU 2 0003 LCD2 EQU 3 ;_________________________________ ; BIN TO DECIMAL CONVERSION TEMPORARYSTORAGE 0862 SAVEA RMB 1 ; ACCUMULATOR A 0863 SAVEX RMB 2 ; STORE DATA POINTER 0865 SAVEX1 RMB 2 ; POINTER TO CONSTANTS 0867 ASCIIC RMB 5 ; ASCII CHARACTERS 086c ASCBUFE RMB 1 ; THIS SHOULD BE INIT TO 0 086d SIGN RMB 1 ; SIGN CHARACTER ; 086e DEBU RMB 1 ; DEBUG INDICATOR ;_______________________________ ; LCD DRIVER EQUATES 0000 LCD_DATA EQU PORTA 0001 LCD_CTRL EQU PORTB 0001 E EQU $1 ;E FOR NORMAL DISPLAYS 0008 E1 EQU $8 ;E1 FOR BIG 4 X 40 DISPLAY 0010 E2 EQU $10 ;E2 FOR BIG 4 X 40 DISPLAYS 0004 RW EQU $4 0002 RS EQU $2 ; 0020 DIAG EQU $20 ;DIAG REQUEST BIT 0040 DIAG2 EQU $40 ;DIAG PAGE 2 ; ; LCD DRIVER VARIABLES 086f TIME RMB 2 ;DELAY COUNTER ; ; SELECTOR KNOB VARIABLES 0020 FA: EQU $20 ; PHASE A BIT 0040 FB: EQU $40 ; PHASE B BIT 0080 BUT: EQU $80 ; BUTTON PRESSED BIT 0040 IRQEN: EQU $40 ; IRQ ENABLE BIT ; 0871 KNOBV: RMB 1 ; KNOB U / DOWN VALUE 0872 BUTPR: RMB 1 ; BUTTON PRESSED 0873 OBVAL: RMB 1 ; ;______________________________________________ ; f000 ORG ROMBS ; START OF PROGRAM ROM ; ;______________________________________________ START: f000 cf 0b ff LDS #STACK ; initialize stack pointer ; f003 86 57 LDAA #BUFFE-BUFFER+1 ; DEBUG CAPTURE BUFFER f005 7a 08 00 STAA BUFL ; STORE CAPTURE BUFFER LENGTH f008 16 f6 0f JSR BUFINIT ; INIT DEBUG CAPTURE BUFFER ; f00b 79 08 6c CLR ASCBUFE ; SET EOT TO PRINT BUFFER ; ; INIT LCD PORTS A & B ; f00e 79 00 01 CLR LCD_CTRL f011 79 00 00 CLR LCD_DATA f014 c6 ff LDAB #$FF f016 5b 02 STAB DDRA ;A&B PORTS = OUTPUTS f018 c6 1f LDAB #%00011111 f01a 5b 03 STAB DDRB ;B/D5 = DIAG INPUT ;B PULL UPS ARE ON ; f01c 16 f5 57 JSR INITLCD ; ; #1 (ALDL) SARJAPORTIN ALUSTUS 8192 NOPEUTEEN ; f01f 86 3d LDAA #61 f021 5a c9 STAA SC1BDL f023 86 0c LDAA #%00001100 f025 5a cb STAA SC1CR2 ; ; #0 RS232 SARJAPORTIN ALUSTUS 9600 NOPEUTEEN ; f027 86 34 LDAA #52 f029 5a c1 STAA SC0BDL f02b 86 0c LDAA #%00001100 f02d 5a c3 STAA SC0CR2 ; ; INIT KNOB I/O ; f02f 86 e0 LDAA #FA+FB+BUT ; SET KEY INT BITS f031 5a 20 STAA KWIED f033 79 08 71 CLR KNOBV f036 79 08 72 CLR BUTPR f039 10 ef CLI ; ENABLE IRQS ; ; INIT AD CONVERTER ; f03b 86 80 LDAA #$80 f03d 5a 62 STAA ATDCTL2 ; TURN CONVERTER ON f03f 86 70 LDAA #$70 f041 5a 65 STAA ATDCTL5 ; START SCANNER ; ; ; INIT COP ; f043 86 07 LDAA #$07 ;PUT COP AT WORK f045 5a 16 STAA COPCTL ;RESET OCCURS AFTER 1S INACTIVITY f047 16 f6 3c JSR COP_RESET ;_______________________________________________ ; ; Herätetään TCM, lähetetään komento ja luetaan ; data bufferiin sekä lähetetään RS232 väylälle ; f04a 18 0b 02 08 61 MOVB #LCD1, OCH ; SELECT LCD1 f04f 86 04 LDAA #4 f051 16 f4 f8 JSR LCDADDR ; CENTER TEXT f054 ce f6 a4 LDX #BANNER f057 16 f3 5a JSR OSTRC ; PRINT IT ; f05a 18 0b 03 08 61 MOVB #LCD2, OCH f05f 86 09 LDAA #9 f061 16 f4 f8 JSR LCDADDR ; CENTER TEXT f064 ce f6 c5 LDX #HUMTXT f067 16 f3 5a JSR OSTRC f06a 16 f6 27 JSR DLY500 f06d 16 f6 3c JSR COP_RESET ; f070 18 0b 01 08 61 MOVB #ALDL, OCH ; SELECT ALDL CHANELL f075 ce f6 79 LDX #COMMAND1 ; WAKE UP STRING ??? f078 16 f3 4d JSR OSTRB ; WAKE UP ALDL BUS f07b 16 f6 1f JSR DLY100 ; WAIT 100 MS f07e 16 f6 1f JSR DLY100 ; 200 IS NEDED IF FRAME COMES ANYWAY ; f081 16 f6 3c JSR COP_RESET ; ;___________________________________ f084 ce f6 79 MAIN: LDX #COMMAND1 ; READ DATA COMMAND f087 18 0b 01 08 61 MOVB #ALDL, OCH ; SELECT ALDL CHANELL f08c 16 f3 4d JSR OSTRB ; SEND TO ALDL BUS ; f08f 18 03 08 01 08 59 MOVW #BUFFER, BUFNDX ; CAPTURE BUFFER ADDRESS f095 16 f6 3c JSR COP_RESET f098 79 08 6e CLR DEBU ; CLEAR DEBUG INDICATOR f09b 96 cf LDAA SC1DRL ; CLEAR CARBAGE FROM ALDL IN ; f09d 18 0b 00 08 61 MAIN1: MOVB #RS232, OCH ; SELECT RS232 OUTPUT f0a2 16 f2 e2 JSR INCH1 ; READ FROM ALDL f0a5 16 f2 f8 JSR OUTC ; ECHO TO RS232 BUS FOR PC ; f0a8 b1 f6 84 CMPA HE1 ; WAIT FOR HEADER (1) BYTE f0ab 26 f0 BNE MAIN1 f0ad 7a 08 5e STAA CSUM ; START CHECKSUM CALCULATION f0b0 18 0b 01 08 6e MAIN2: MOVB #1, DEBU f0b5 16 f2 e2 JSR INCH1 f0b8 16 f2 f8 JSR OUTC ; f0bb b1 f6 85 CMPA HE2 ; WAIT FOR HEADER (2) BYTE f0be 26 f0 BNE MAIN2 f0c0 18 0b 02 08 6e MOVB #2, DEBU f0c5 bb 08 5e ADDA CSUM ; CALCULATE CHECKSUM f0c8 7a 08 5e STAA CSUM ; ; START READING TO DATA BUFFER ; IF THIS FAILS (TAKES TOO LONG) COP RESTE OCCURES ; f0cb 18 03 08 01 08 59 MOVW #BUFFER, BUFNDX ; CAPTURE BUFFER ADDRESS ; f0d1 16 f2 e2 CAP0: JSR INCH1 ;DATA FROM ALDL BUS f0d4 16 f2 f8 JSR OUTC ;ECHO ALSO TO RS232 BUS ; f0d7 fe 08 59 CAP1: LDX BUFNDX ;STORE DATA TO BUFFER A=DATA f0da 6a 00 STAA 0,X f0dc bb 08 5e ADDA CSUM ; CALCULATE CHECKSUM f0df 7a 08 5e STAA CSUM f0e2 8e 08 57 CPX #BUFFE ;LAST BYTE ? f0e5 27 06 BEQ CAP2 f0e7 08 INX f0e8 7e 08 59 STX BUFNDX ;INCREMENT BUFFER INDEX f0eb 20 e4 BRA CAP0 ;MORE TO COME ; f0ed 16 f6 3c CAP2: JSR COP_RESET ;___________________________________ ; ; DISPLAY BUFFER DATA ; f0f0 16 f5 3d JSR LCD_CLR ; CLEAR LCD ; f0f3 18 0b 02 08 61 MOVB #LCD1, OCH ; OUTPUT TO UPPER LCD f0f8 86 00 LDAA #0 ; ROW 0, POS 0 f0fa 16 f4 f8 JSR LCDADDR ; f0fd 4e 01 20 03 BRSET PORTB, DIAG, NORM ; DIAG REQUEST ? f101 06 f1 c9 JMP DDIS f104 4e 01 40 03 NORM: BRSET PORTB, DIAG2, NORM1 ; SECOND PAGE f108 06 f1 9b JMP NORM2 ;___________________________________ ; ; NORMAL DISPLAY PAGE 1 ; NORM1: f10b ce f6 f1 LDX #ERTXT ;SHOW ENGINE RPM f10e 16 f3 5a JSR OSTRC f111 fc 08 19 LDD ERPM f114 16 f3 95 JSR OUTRPM ; f117 ce f7 03 LDX #IRTXT ;SHOW INPUT RPM f11a 16 f3 5a JSR OSTRC f11d fc 08 1b LDD IRPM f120 16 f3 95 JSR OUTRPM ; f123 ce f7 25 LDX #VSTXT ;SHOW VEHICLE SPEED f126 16 f3 5a JSR OSTRC f129 f6 08 1f LDAB SPEED f12c 16 f3 d3 JSR OUTSPEED ;________ f12f 86 29 LDAA #41 ; ROW 1, POS 0 f131 16 f4 f8 JSR LCDADDR ; f134 ce f6 fa LDX #TRTXT ;SHOW TCC RPM f137 16 f3 5a JSR OSTRC f13a fc 08 1d LDD TRPM f13d 16 f3 95 JSR OUTRPM ; f140 ce f7 0c LDX #ORTXT ;SHOW OUTPUT RPM f143 16 f3 5a JSR OSTRC f146 fc 08 1f LDD ORPM f149 16 f3 95 JSR OUTRPM ; f14c ce f7 1d LDX #TTTXT ; SHOW TRANS TEMP f14f 16 f3 5a JSR OSTRC f152 f6 08 18 LDAB TTEMP f155 16 f4 01 JSR OUTTEMP ; ;______________________ f158 18 0b 03 08 61 MOVB #LCD2, OCH ; SELECT LOWER (SECOND) LCD f15d 86 00 LDAA #0 ; FIRST ROW, POS 0 f15f 16 f4 f8 JSR LCDADDR ; f162 ce f7 2d LDX #TSTXT ; SHOW TCC SLIP RPM f165 16 f3 5a JSR OSTRC f168 fc 08 3f LDD TCCSL f16b 16 f3 a7 JSR OUTTCC ; SHOW SIGNED VALUE ; f16e ce f6 e8 LDX #BTXT ; SHOW BATTERY VOLTAGE f171 16 f3 5a JSR OSTRC f174 f6 08 27 LDAB BATT f177 16 f3 dd JSR OUTBATT f17a ce f7 15 LDX #TBTXT ; SHOW THROTTLE % f17d 16 f3 5a JSR OSTRC f180 f6 08 15 LDAB TB f183 16 f3 ee JSR OUTPROS ;_____________ f186 86 29 LDAA #41 ; SECOND ROW OF DISP 2, POS 0 f188 16 f4 f8 JSR LCDADDR ; f18b 16 f4 5a JSR OPRN ; PRINT SELECTOR f18e 16 f4 79 JSR CGPRN ; SHOW CURRENT GEAR ; f191 f6 08 15 LDAB TB ; TEST BAR DISPLAY WITH THROTTLE f194 16 f4 3f JSR OUTBAR ; f197 18 20 00 dc LBRA OVER ;_______________________ ; ; NORMAL DISPLAY SECOND PAGE ; NORM2: ; f19b 16 f4 79 JSR CGPRN ; PRINT CURRENT GEAR ; f19e 86 29 LDAA #41 ; SECOND ROW OF DISP 2, POS 0 f1a0 16 f4 f8 JSR LCDADDR ; f1a3 16 f4 9a JSR PRNBIT ; SHOW OTHER BITS ;___________________ f1a6 18 0b 03 08 61 MOVB #LCD2, OCH ; SELECT LOWER (SECOND) LCD f1ab 86 00 LDAA #0 ; FIRST ROW, POS 0 f1ad 16 f4 f8 JSR LCDADDR ; f1b0 16 f4 8a JSR PRNID ; SHOW PROM ID ; f1b3 86 29 LDAA #41 ; SECOND ROW OF DISP 2, POS 0 f1b5 16 f4 f8 JSR LCDADDR ; f1b8 ce f6 86 LDX #ADTXT ; SHOW A/D CONVERTERS f1bb 16 f3 5a JSR OSTRC f1be 87 CLRA f1bf cd 00 70 LDY #ADR0H ; FIRST A/D CHANNELL f1c2 16 f4 21 JSR OUT10HEX ; SHOW 5 FIRST CONVERTERS ; f1c5 18 20 00 ae LBRA OVER ;___________________________ ; ; DIAGNOSTIC DISPLAY PAGES ; f1c9 4f 01 40 36 DDIS: BRCLR PORTB, DIAG2, DDIS2 ; f1cd 86 20 LDAA #$20 ; DIAG PRINTOUT IF DIAG=0 f1cf cd 08 15 LDY #BUFFER+20 f1d2 16 f4 21 JSR OUT10HEX ; f1d5 86 29 LDAA #41 ; ROW 1, POS 0 f1d7 16 f4 f8 JSR LCDADDR f1da 86 30 LDAA #$30 ; DIAG PRINTOUT IF DIAG=0 f1dc cd 08 1f LDY #BUFFER+30 f1df 16 f4 21 JSR OUT10HEX ; f1e2 18 0b 03 08 61 MOVB #LCD2, OCH ; SELECT LOWER (SECOND) LCD f1e7 86 00 LDAA #0 ; FIRST ROW, POS 0 f1e9 16 f4 f8 JSR LCDADDR f1ec 86 40 LDAA #$40 ; DIAG PRINTOUT IF DIAG=0 f1ee cd 08 29 LDY #BUFFER+40 f1f1 16 f4 21 JSR OUT10HEX ; f1f4 86 29 LDAA #41 ; SECOND ROW OF DISP 2, POS 0 f1f6 16 f4 f8 JSR LCDADDR f1f9 86 50 LDAA #$50 ; DIAG PRINTOUT IF DIAG=0 f1fb cd 08 33 LDY #BUFFER+50 f1fe 16 f4 21 JSR OUT10HEX f201 20 74 BRA OVER ;______________ f203 86 60 DDIS2: LDAA #$60 ; DIAG PRINTOUT IF DIAG=0 f205 cd 08 3d LDY #BUFFER+60 f208 16 f4 21 JSR OUT10HEX ; f20b 86 29 LDAA #41 ; ROW 1, POS 0 f20d 16 f4 f8 JSR LCDADDR f210 86 70 LDAA #$70 ; DIAG PRINTOUT IF DIAG=0 f212 cd 08 47 LDY #BUFFER+70 f215 16 f4 21 JSR OUT10HEX ; f218 18 0b 03 08 61 MOVB #LCD2, OCH ; SELECT LOWER (SECOND) LCD f21d 86 00 LDAA #0 ; FIRST ROW, POS 0 f21f 16 f4 f8 JSR LCDADDR f222 86 80 LDAA #$80 ; DIAG PRINTOUT IF DIAG=0 f224 cd 08 51 LDY #BUFFER+80 f227 16 f4 21 JSR OUT10HEX ; f22a ce f6 a0 LDX #CSTXT ; CHECKSUM f22d 16 f3 5a JSR OSTRC f230 b6 08 5e LDAA CSUM f233 16 f3 2e JSR OUT2H ; f236 86 29 LDAA #41 ; SECOND ROW OF DISP 2, POS 0 f238 16 f4 f8 JSR LCDADDR ; f23b 86 23 LDAA #'#' f23d 16 f2 f8 JSR OUTC f240 ce 08 01 LDX #BUFFER f243 b6 08 71 LDAA KNOBV f246 1a e4 LEAX A,X ; SET WHERE TO DUSPLAY f248 18 0e TAB f24a 34 PSHX f24b 16 f3 d3 JSR OUTSPEED ; SHOW INDEX IN DECIMAL f24e 30 PULX f24f ec 00 LDD 0,X f251 16 f3 1c JSR OUT4HS ; SHOW IN 16 BIT f254 a6 00 LDAA 0,X f256 16 f3 23 JSR OUT2HS ; SHOW 8 BIT f259 a6 00 LDAA 0,X f25b 16 f3 90 JSR OUTBINS ; SHOW AS BINARY f25e 16 f3 18 JSR OUTS f261 b6 08 71 LDAA KNOBV f264 16 f3 23 JSR OUT2HS f267 b6 08 72 LDAA BUTPR f26a 16 f3 23 JSR OUT2HS ; f26d 20 08 BRA OVER ; f26f 86 00 LDAA #$00 ; DIAG PRINTOUT IF DIAG=0 f271 cd 08 01 LDY #BUFFER f274 16 f4 21 JSR OUT10HEX ; OVER: ;____________________________ ; f277 16 f6 3c JSR COP_RESET f27a 16 f6 27 JSR DLY500 ; WAIT 500 MS f27d 16 f6 3c JSR COP_RESET ; f280 06 f0 84 JMP MAIN ; NEW ROUND ;____________________________________________________________ ; ; FAULT PROCESSING ; THIS EXECUTES IF COP RESET OCCURES ; f283 cf 0b ff FLT: LDS #STACK ; initialize stack pointer f286 79 00 01 CLR LCD_CTRL f289 79 00 00 CLR LCD_DATA f28c c6 ff LDAB #$FF f28e 5b 02 STAB DDRA ;A&B PORTS = OUTPUTS f290 c6 1f LDAB #%00011111 f292 5b 03 STAB DDRB ;B/D5 = DIAG INPUT ;B PULL UPS ARE ON f294 16 f5 57 JSR INITLCD f297 16 f6 3c JSR COP_RESET f29a 18 0b 02 08 61 MOVB #LCD1, OCH ; OUTPUT TO UPPER LCD f29f ce f6 8b LDX #FAUTXT f2a2 16 f3 5a JSR OSTRC f2a5 fc 08 59 LDD BUFNDX ; SHOW WHERE WE STOPPED f2a8 83 08 01 SUBD #BUFFER f2ab 16 f3 1c JSR OUT4HS f2ae b6 08 6e LDAA DEBU f2b1 16 f3 23 JSR OUT2HS ; SHOW DEBUG POINTER f2b4 16 f6 3c JSR COP_RESET f2b7 16 f6 27 JSR DLY500 ;WAIT 500 MS f2ba 16 f6 3c JSR COP_RESET f2bd 16 f6 27 JSR DLY500 ;WAIT 500 MS f2c0 16 f6 3c JSR COP_RESET f2c3 16 f6 27 JSR DLY500 ;WAIT 500 MS f2c6 16 f6 3c JSR COP_RESET f2c9 06 f0 00 JMP START ; RESTART WHOLE THING ; ;____________________________________________________________ ; ; SERIAL CHANNELL SUBROUTINES. ACCUMULATORS ARE PRESERVED ; A = DATA ; f2cc 37 OUTCH1: PSHB ; 1 = ALDL KANAVA f2cd d6 cc OU1: LDAB SC1SR1 f2cf c4 80 ANDB #$80 f2d1 27 fa BEQ OU1 f2d3 5a cf STAA SC1DRL ;MERKKI LAHTI f2d5 33 PULB f2d6 3d RTS ; f2d7 37 OUTCH0: PSHB ; 0 = RS232 PAATEKANAVA f2d8 d6 c4 OU0: LDAB SC0SR1 f2da c4 80 ANDB #$80 f2dc 27 fa BEQ OU0 f2de 5a c7 STAA SC0DRL ;MERKKI LAHTI f2e0 33 PULB f2e1 3d RTS ; f2e2 37 INCH1: PSHB ; 1 = ALDL KANAVA INPUT f2e3 d6 cc INC1: LDAB SC1SR1 f2e5 c4 20 ANDB #%00100000 ;ONKO RDRF ? f2e7 27 fa BEQ INC1 f2e9 96 cf LDAA SC1DRL ;HAETAAN MERKKI f2eb 33 PULB f2ec 3d RTS ; f2ed 37 INCH0: PSHB ; 0 = RS232 KANAVA INPUT f2ee d6 c4 INC0: LDAB SC0SR1 f2f0 c4 20 ANDB #%00100000 ;ONKO RDRF ? f2f2 27 fa BEQ INC0 f2f4 96 c7 LDAA SC0DRL ;HAETAAN MERKKI f2f6 33 PULB f2f7 3d RTS ;_________________________________________________ ; ; GENERAL OUTPPUT CHARACTER ROUTINE ; A = CAHARACTER, OCH = CHANELL ; f2f8 36 OUTC: PSHA f2f9 b6 08 61 LDAA OCH ; SELECT CHANELL f2fc 81 00 CMPA #0 f2fe 26 03 BNE OUTC1 f300 32 PULA f301 20 d4 BRA OUTCH0 ; 0 = RS232 f303 81 01 OUTC1 CMPA #1 f305 26 03 BNE OUTC2 f307 32 PULA f308 20 c2 BRA OUTCH1 ; 1 = ALDL f30a 81 02 OUTC2 CMPA #2 f30c 26 05 BNE OUTC3 f30e 32 PULA f30f 18 20 01 c0 LBRA LCD_WRITE1 ; 2 = LCD1 f313 32 OUTC3 PULA f314 18 20 01 c6 LBRA LCD_WRITE2 ; 3 = LCD2 ; ; OUTPUT ONE SPACE ; f318 86 20 OUTS: LDAA #$20 f31a 20 dc BRA OUTC ;______________________________________________ ; ; OUTPUT 4 HEX CHARACTERS + SPACE FROM D f31c 37 OUT4HS: PSHB f31d 16 f3 2e JSR OUT2H f320 32 PULA ;SWAP BYTES f321 20 00 BRA OUT2HS ;___________________________________________ ; OUTPUT 2 HEX CHARACTERS+ SPACE FROM A f323 36 OUT2HS: PSHA f324 16 f3 2e JSR OUT2H f327 86 20 LDAA #$20 f329 16 f2 f8 JSR OUTC ; PUT TO GENERAL OUTPUT f32c 32 PULA f32d 3d RTS ;___________________________________ f32e 36 OUT2H: PSHA f32f 84 f0 ANDA #$F0 f331 44 LSRA ; SHIFT RIGHT & FILL WITH 0 f332 44 LSRA f333 44 LSRA f334 44 LSRA f335 16 f3 3f JSR OUTH f338 32 PULA f339 84 0f ANDA #$0F f33b 16 f3 3f JSR OUTH f33e 3d RTS ; f33f 8a 30 OUTH: ORAA #$30 f341 81 39 CMPA #$39 ;NUMBERS 0-9 f343 22 02 BHI OUTH1 f345 20 02 BRA OUTH2 f347 8b 07 OUTH1: ADDA #$07 ;MAKE IT A - F f349 16 f2 f8 OUTH2: JSR OUTC ; PUT TO GENERAL OUTPUT f34c 3d RTS ; ;___________________________________________________ ; ; PRINT BINARY STRING POINTED BY X TO GENERAL OUTPUT ; FIRST BYTE OF STRING IS NUMBER OF BYTES ! ; f34d e6 00 OSTRB: LDAB 0,X ;HOW MANY TO GO ? f34f 08 INX f350 a6 00 OSTRB1: LDAA 0,X ;FETCH BYTE f352 16 f2 f8 JSR OUTC ;PUT TO OUTPUT f355 08 INX f356 53 DECB f357 26 f7 BNE OSTRB1 f359 3d RTS ; ; PRINT ASCII CHARACTER STRING POINTED BY X TO GENERAL OUTPT ; NUL (0) IS EOT ; f35a a6 00 OSTRC: LDAA 0,X ;FETCH BYTE f35c 27 06 BEQ OSTRC1 ; EOT f35e 16 f2 f8 JSR OUTC ;PUT TO OUTPUT f361 08 INX f362 20 f6 BRA OSTRC f364 3d OSTRC1: RTS ; ; PRINT ASCII CHARACTER STRING + 2 SPACES ; OSTRC2S: f365 16 f3 5a JSR OSTRC f368 ce f6 dc LDX #SSTR f36b 16 f3 5a JSR OSTRC f36e 3d RTS ; ; PRINT 8 BIT VALUE IN BINARY FORMAT ; f36f 36 OUTBIN: PSHA f370 7a 08 5f STAA OB f373 18 0b 08 08 60 MOVB #8, OBCTR ; f378 b6 08 5f OUTB1: LDAA OB f37b 2b 04 BMI OUTB2 f37d 86 30 LDAA #$30 ; 0 f37f 20 02 BRA OUTB3 f381 86 31 OUTB2: LDAA #$31 ; 1 f383 16 f2 f8 OUTB3: JSR OUTC f386 78 08 5f ASL OB f389 73 08 60 DEC OBCTR f38c 26 ea BNE OUTB1 f38e 32 PULA f38f 3d RTS ; OUTBINS: ; PRINT BINARY + SPACE f390 16 f3 6f JSR OUTBIN f393 20 83 BRA OUTS ; ;________________________________________ ; ; SCALED TRANSMISSION VALUE OUTPUTS ; ; 16 - BIT VALUE IN D DIVIDED BY 8 ; D = OUTPUT VALUE ; f395 ce 00 08 OUTRPM: LDX #8 f398 18 10 IDIV ;D/8 f39a 34 PSHX f39b 3a PULD ; TRANSFER OUTCOME TO D f39c 16 f5 ac JSR CVBTD ; DO BIN => ASCII CONV f39f 16 f5 f2 JSR ZSUPP ; REMOVE LEADING ZEROS f3a2 08 INX ; DROP MSB OFF f3a3 16 f3 65 JSR OSTRC2S ; PRINT CONVERTED CHARACTERS f3a6 3d RTS ; ; 16 - BIT SIGNED VALUE IN D DIVIDED BY 8 ; D = OUTPUT VALUE ; f3a7 ce 00 08 OUTTCC: LDX #8 ; TCC SLIP IS SIGNED 16 BIT VALUE f3aa 18 0b 20 08 6d MOVB #$20, SIGN ; GUESS POSITIVE f3af 97 TSTA f3b0 2a 0e BPL OUTTC1 ; IS POSITIVE f3b2 7c 08 63 STD SAVEX f3b5 cc 00 00 LDD #$0000 f3b8 b3 08 63 SUBD SAVEX f3bb 18 0b 2d 08 6d MOVB #$2D, SIGN ; IS NEGATIVE ; f3c0 18 10 OUTTC1: IDIV ;D/8 SIGNED f3c2 34 PSHX f3c3 3a PULD ; TRANSFER OUTCOME TO D f3c4 16 f5 ac JSR CVBTD ; DO BIN => ASCII CONV f3c7 16 f5 f2 JSR ZSUPP ; REMOVE LEADING ZEROS f3ca b6 08 6d LDAA SIGN f3cd 6a 00 STAA 0,X ; WRITE SIGN OVER MSB f3cf 16 f3 65 JSR OSTRC2S ; PRINT CONVERTED CHARACTERS f3d2 3d RTS ; ; VECHICLE SPEED 0 - 255 KPH ; B = OUTPUT VALUE ; OUTSPEED: f3d3 87 CLRA f3d4 16 f5 ac JSR CVBTD f3d7 08 INX f3d8 08 INX f3d9 16 f3 65 JSR OSTRC2S ; PRINT CONVERTED CHARACTERS f3dc 3d RTS ; ; BATTERY VOLTAGE 0 -25.5 v ; B = OUTPUT VALUE ; OUTBATT: f3dd 87 CLRA f3de 16 f5 ac JSR CVBTD ; DO BIN => ASCII CONV f3e1 08 INX f3e2 ec 01 LDD 1,X f3e4 6c 00 STD 0,X f3e6 86 2e LDAA #'.' f3e8 6a 02 STAA 2,X f3ea 16 f3 65 JSR OSTRC2S f3ed 3d RTS ; ; THROTTLE % 0 - 99 % ; B = OUTPUT VALUE ; OUTPROS: f3ee 86 64 LDAA #100 ; FIRST MULTIPLY BY 100 f3f0 12 MUL ; A X B f3f1 ce 01 00 LDX #256 f3f4 18 10 IDIV ; D / X f3f6 34 PSHX f3f7 3a PULD ; TRANSFER OUTCOME TO D f3f8 16 f5 ac JSR CVBTD ; DO BIN TO ASCII CONV f3fb 08 INX f3fc 08 INX ; REDUCE TO 3 DIGITS f3fd 16 f3 65 JSR OSTRC2S f400 3d RTS ; ; TEMPERATURE DEGREES CELCIUS -40 - +215 ; B = TEMP OUTTEMP: f401 87 CLRA ; PREPARE D FOR CONVERSION f402 c0 28 SUBB #40 ; SEE IF POSITIVE SIDE f404 22 12 BHI OUTT1 f406 cb 28 ADDB #40 ; RSTORE ORIGINAL VALUE f408 86 28 LDAA #40 f40a 18 16 SBA ; CALCULATE VALUE BELOW 0 f40c 18 0e TAB f40e 87 CLRA f40f 16 f5 ac JSR CVBTD ; DO CONVERSION f412 86 2d LDAA #'-' f414 6a 02 STAA 2,X f416 20 03 BRA OUTT2 f418 16 f5 ac OUTT1: JSR CVBTD ; DO CONVERSION f41b 08 OUTT2: INX f41c 08 INX ; REDUCE TO 3 DIGITS f41d 16 f3 65 JSR OSTRC2S f420 3d RTS ; ; OUTPUT 10 BYTES IN HEX FORMAT ; A = HEADER NUMBER Y POINTS TO STRING ; OUT10HEX: f421 36 PSHA f422 86 23 LDAA #'#' f424 16 f2 f8 JSR OUTC f427 32 PULA f428 16 f3 23 JSR OUT2HS f42b 16 f3 18 JSR OUTS ; PRINT HEADER FOR LINE ; f42e 18 0b 0a 08 5d MOVB #10, TEMP f433 a6 40 OUT101: LDAA 0,Y ; PRINT HEX BYTES POINTED BY Y f435 16 f3 23 JSR OUT2HS f438 02 INY f439 73 08 5d DEC TEMP f43c 26 f5 BNE OUT101 f43e 3d RTS ; ; OUTPUT 0 - 26 LONG BAR ; B = 0 -255 INPUT VALUE ; f43f 87 OUTBAR: CLRA f440 ce 00 0a LDX #10 ; DIVIDE BY 10 f443 18 10 IDIV f445 34 PSHX f446 3a PULD ; B = LOOP COUNT f447 7b 08 5d STAB TEMP f44a 72 08 5d INC TEMP f44d 86 ff LDAA #$FF ; BAR CHARACTER f44f 73 08 5d OBAR1: DEC TEMP f452 27 05 BEQ OBAR2 ; EXIT f454 16 f2 f8 JSR OUTC f457 20 f6 BRA OBAR1 f459 3d OBAR2: RTS ; ; OUTPUT GEAR SELECTOR LABEL ; READ SELECTOR BITS FROM PRBIT ; f45a f6 08 56 OPRN: LDAB PRBIT ; GET SWITCH ETC BITS f45d c4 1c ANDB #PRNMASK ; ADJUST SHIFT BITS TO INDEX f45f 54 LSRB ; LEAVE IT 2 x VALUE FOR WORD LOOKUP f460 ce f4 69 LDX #PRNOD ; COMPUTE AND LOAD f463 ee e5 LDX B,X ; CORRECT TEXT STRING ADDRESS TO X f465 16 f3 5a JSR OSTRC ; OUTPUT SELECTOR LABEL f468 3d RTS ; f469 f7 59 PRNOD: FDB #XTXT ; 0 = ILLEGAL VALUE f46b f7 45 FDB #ODTXT f46d f7 59 FDB #XTXT ; 2 = ILLEGAL f46f f7 4a FDB #DTXT f471 f7 40 FDB #RTXT f473 f7 3b FDB #PTXT ; 6 = PARK / NEUTRAL f475 f7 54 FDB #ITXT f477 f7 4f FDB #IITXT ; ; SHOW CURRENT GEAR VALUE ; f479 ce f7 35 CGPRN: LDX #CGTXT ; SHOW CURRENT GEAR f47c 16 f3 5a JSR OSTRC f47f b6 08 30 LDAA CGEAR f482 42 INCA ; ADJUST VALUE f483 16 f3 23 JSR OUT2HS f486 16 f3 18 JSR OUTS ; ADJUST LENGTH f489 3d RTS ; ; SHOW PROM ID ; f48a ce f6 df PRNID: LDX #PRTXT ; SHOW PROM ID f48d 16 f3 5a JSR OSTRC f490 fc 08 53 LDD PROMID f493 16 f3 1c JSR OUT4HS f496 16 f3 18 JSR OUTS ; ADJUST LENGTH f499 3d RTS ; ; SHOW MISELANOUS BITS AC & BRAKE ; f49a 1f 08 55 80 06 PRNBIT: BRCLR BBITS, BREQ, BITP1 f49f ce f7 5e LDX #BRRTXT f4a2 16 f3 5a JSR OSTRC ; f4a5 1e 08 56 20 06 BITP1: BRSET PRBIT, BRAKE, BITP2 f4aa ce f7 71 LDX #BRTXT f4ad 16 f3 5a JSR OSTRC ; f4b0 1f 08 55 40 06 BITP2: BRCLR BBITS, ACREQ, BITP3 f4b5 ce f7 69 LDX #ACRTXT f4b8 16 f3 5a JSR OSTRC ; f4bb 1f 08 56 40 06 BITP3: BRCLR PRBIT, ACON, BITP4 f4c0 ce f7 7b LDX #ACTXT f4c3 16 f3 5a JSR OSTRC ; f4c6 3d BITP4: RTS ;_________________________________________ ; ; LCD DISPLAY SUBROUTINES ; ; VAR_DELAY: f4c7 c6 c7 LDAB #199 ; 100 ys DELAY @ 8MHz f4c9 a7 L1: NOP f4ca 04 31 fc DBNE B, L1 f4cd 73 08 6f DEC TIME f4d0 26 f5 BNE VAR_DELAY f4d2 3d RTS LCD_WRITE1: ;THIS ROUTINE WRITES 4 X 40 UPPER HALF ;& NORMAL DISPLAYS f4d3 5a 00 STAA LCD_DATA ;LCD WRITE BYTE f4d5 4c 01 09 BSET LCD_CTRL, E+E1 f4d8 a7 NOP f4d9 4d 01 09 BCLR LCD_CTRL, E+E1 f4dc 20 14 BRA L20 ; LCD_WRITE2: ;THIS ROUTINE WRITES 4 X 40 LOWER HALF f4de 5a 00 STAA LCD_DATA ;LCD WRITE BYTE f4e0 4c 01 10 BSET LCD_CTRL, E2 f4e3 a7 NOP f4e4 4d 01 10 BCLR LCD_CTRL, E2 f4e7 20 09 BRA L20 ; LCD_WRITE: ;THIS ROUTINE WRITES ALL DISPLAYS f4e9 5a 00 STAA LCD_DATA ;LCD WRITE BYTE f4eb 4c 01 19 BSET LCD_CTRL, E+E1+E2 f4ee a7 NOP f4ef 4d 01 19 BCLR LCD_CTRL, E+E1+E2 f4f2 86 78 L20: LDAA #120 ;#107 ; 40 ys DELAY f4f4 04 30 fd L2: DBNE A, L2 f4f7 3d RTS ;_______________________________ ; ; SETS LCD CURSOR ADDRESS ACCORDING OCH SELECTOR ; A = ADDRESS, DESTROYS B ; f4f8 f6 08 61 LCDADDR: LDAB OCH f4fb c1 02 CMPB #LCD1 f4fd 27 02 BEQ LCD_ADDR1 f4ff 20 10 BRA LCD_ADDR2 ; LCD_ADDR1: ;THIS ROUTINE SETS ADDRESS FOR UPPER ; HALF & NORMAL DISPLAYS f501 4d 01 02 BCLR LCD_CTRL, RS ;SEND LCD ADDRESS f504 8a 80 ORAA #$80 ; D7 = ALLWAYS 1 f506 5a 00 STAA LCD_DATA f508 4c 01 09 BSET LCD_CTRL, E+E1 f50b a7 NOP f50c 4d 01 09 BCLR LCD_CTRL, E+E1 f50f 20 1e BRA L40 LCD_ADDR2: ;THIS ROUTINE SETS ADDRESS FOR LOWER ;HALF OF 4 X 40 DISPLAY f511 4d 01 02 BCLR LCD_CTRL, RS ;SEND LCD ADDRESS f514 8a 80 ORAA #$80 ; D7 = ALLWAYS 1 f516 5a 00 STAA LCD_DATA f518 4c 01 10 BSET LCD_CTRL, E2 f51b a7 NOP f51c 4d 01 10 BCLR LCD_CTRL, E2 f51f 20 0e BRA L40 ; LCD_ADDRB: ;THIS ROUTINE SETS ADDRESS FOR ALL DISPLAYS f521 4d 01 02 BCLR LCD_CTRL, RS ;SEND LCD ADDRESS f524 8a 80 ORAA #$80 ; D7 = ALLWAYS 1 f526 5a 00 STAA LCD_DATA f528 4c 01 19 BSET LCD_CTRL, E+E1+E2 f52b a7 NOP f52c 4d 01 19 BCLR LCD_CTRL, E+E1+E2 f52f 86 a0 L40: LDAA #160 ; 40+ ys DELAY f531 04 30 fd L4: DBNE A, L4 ; f534 4c 01 02 BSET LCD_CTRL, RS ; SET TO DATA MODE ; f537 86 6a LDAA #106 ; 40 ys DELAY f539 04 30 fd L41: DBNE A, L41 f53c 3d RTS ; LCD_CLR: ;CLEARS ALL DISPLAYS f53d 4d 01 02 BCLR LCD_CTRL, RS ; SET LCD TO COMMAND MODE f540 86 01 LDAA #$01 ; CLEAR DISPLAY, SET CURSOR ADDR = 0 f542 5a 00 STAA LCD_DATA f544 4c 01 19 BSET LCD_CTRL, E+E1+E2 f547 a7 NOP f548 4d 01 19 BCLR LCD_CTRL, E+E1+E2 f54b 18 0b 19 08 6f MOVB #25, TIME ; WAIT 2.5 ms f550 16 f4 c7 JSR VAR_DELAY f553 4c 01 02 BSET LCD_CTRL, RS ; BACK TO DATA MODE f556 3d RTS ;___________________ ; INITLCD: ; INIT ALL DISPLAYS f557 18 0b 96 08 6f MOVB #150, TIME ;WAIT 15ms f55c 16 f4 c7 JSR VAR_DELAY ; f55f 18 0b 38 00 00 MOVB #$38, LCD_DATA ;LCD INIT COMMAND f564 4c 01 19 BSET LCD_CTRL, E+E1+E2 ;ALL DISPLAYS f567 a7 NOP f568 4d 01 19 BCLR LCD_CTRL, E+E1+E2 ; f56b 18 0b 29 08 6f MOVB #41, TIME ;WAIT 4.1 ms f570 16 f4 c7 JSR VAR_DELAY ; f573 18 0b 38 00 00 MOVB #$38, LCD_DATA ;LCD SECOND INIT COMMAND f578 4c 01 19 BSET LCD_CTRL, E+E1+E2 f57b a7 NOP f57c 4d 01 19 BCLR LCD_CTRL, E+E1+E2 ; f57f 18 0b 01 08 6f MOVB #1, TIME ;WAIT 100 ys f584 16 f4 c7 JSR VAR_DELAY ; f587 86 38 LDAA #$38 ;THIRD LCD INIT COMMAND f589 16 f4 e9 JSR LCD_WRITE ;LCD MODULE ACCEPTS WRITES ; FUNCTION SET COMMAND ; 8-BIT BUS, 2 ROWS, 5X7 MATRIX f58c 86 38 LDAA #$38 ; DISPLAY ON, CURSOR OFF, NO BLINK f58e 16 f4 e9 JSR LCD_WRITE f591 86 0c LDAA #$0C f593 16 f4 e9 JSR LCD_WRITE f596 86 01 LDAA #$01 ; CLEAR DISPLAY, SET CURSOR ADDR = 0 f598 16 f4 e9 JSR LCD_WRITE f59b 18 0b 12 08 6f MOVB #18, TIME ; WAIT 1.8 ms f5a0 16 f4 c7 JSR VAR_DELAY f5a3 86 06 LDAA #$06 ; INCREMENT, NO DISPLAY SHIFT f5a5 16 f4 e9 JSR LCD_WRITE ; f5a8 4c 01 02 BSET LCD_CTRL, RS ; SET LCD DATA MODE f5ab 3d RTS ; ; ;________________________________________ *REVISION1 *CONVERTBINARY TO DECIMAL & STORE 5 CHAR *CALLINGSEQUENCE *(A,B) BINARY VALUE *(X) POINTER TO STORE DECIMAL CHARS *JSR CVBTD CONVERT ; f5ac ce 08 67 CVBTD LDX #ASCIIC f5af 7e 08 63 STX SAVEX ; SAVE DATA POINTER f5b2 ce f5 e8 LDX #K10K ; (X) POINTER TO CONSTANTS f5b5 79 08 62 CVDEC1 CLR SAVEA ; INZ DEC CHAR f5b8 e0 01 CVDEC2 SUBB 1,X f5ba a2 00 SBCA 0,X f5bc 25 05 BCS CVDEC5 ; OVERFLOW f5be 72 08 62 INC SAVEA ; INC CHAR BEING BUILT f5c1 20 f5 BRA CVDEC2 f5c3 eb 01 CVDEC5 ADDB 1,X ; RESTORE PARTICAL RESULT f5c5 a9 00 ADCA 0,X f5c7 36 PSHA f5c8 7e 08 65 STX SAVEX1 f5cb fe 08 63 LDX SAVEX ; X-STORE CHAR POINTER f5ce b6 08 62 LDAA SAVEA f5d1 8b 30 ADDA #$30 ; MAKE ASCII CHAR f5d3 6a 00 STAA 0,X f5d5 32 PULA RESTORE A f5d6 08 INX f5d7 7e 08 63 STX SAVEX f5da fe 08 65 LDX SAVEX1 ; X-POINTER TO CONSTANTS f5dd 08 INX f5de 08 INX f5df 8e f5 f2 CPX #K10K+10 f5e2 26 d1 BNE CVDEC1 f5e4 ce 08 67 LDX #ASCIIC f5e7 3d RTS *CONSTANTSFOR CONVERSION f5e8 27 10 K10K FDB 10000 f5ea 03 e8 FDB 1000 f5ec 00 64 FDB 100 f5ee 00 0a FDB 10 f5f0 00 01 FDB 1 ; ; SUPPRESS 4 LEADING ZEROS IN ASCII CONVERSION BUFFER ; f5f2 c6 20 ZSUPP: LDAB #$20 ; SPACE f5f4 86 30 LDAA #$30 ; TEST IF 0 f5f6 a1 00 CMPA 0,X f5f8 26 14 BNE ZSUP9 f5fa 6b 00 STAB 0,X f5fc a1 01 CMPA 1,X f5fe 26 0e BNE ZSUP9 f600 6b 01 STAB 1,X f602 a1 02 CMPA 2,X f604 26 08 BNE ZSUP9 f606 6b 02 STAB 2,X f608 a1 03 CMPA 3,X f60a 26 02 BNE ZSUP9 f60c 6b 03 STAB 3,X f60e 3d ZSUP9: RTS ; f60f ce 08 01 BUFINIT: LDX #BUFFER f612 86 00 LDAA #00 f614 6a 00 BUFI1: STAA 0,X f616 8e 08 57 CPX #BUFFE f619 27 03 BEQ BUFI2 f61b 08 INX f61c 20 f6 BRA BUFI1 f61e 3d BUFI2: RTS ; ; DELAY LOOPS ; f61f ce 03 e8 DLY100: LDX #1000 ;DELAY 100 MS f622 7e 08 5b STX DLYCTR f625 20 08 BRA VARDEL ; f627 ce 13 88 DLY500: LDX #5000 ;500 MS DELAY f62a 7e 08 5b STX DLYCTR f62d 20 00 BRA VARDEL ; f62f fe 08 5b VARDEL: LDX DLYCTR ;SET DELAY f632 c6 c7 L00: LDAB #199 ;VARIABLE DELAY DLYCTR * 100YS f634 a7 L11: NOP f635 04 31 fc DBNE B, L11 f638 09 DEX f639 26 f7 BNE L00 f63b 3d RTS ; ; WATCH DOG RESET ; COP_RESET: f63c 86 55 ldaa #$55 ; get 1st COP reset value f63e 5a 17 staa COPRST ; store it f640 86 aa ldaa #$AA ; get 2nd COP reset value f642 5a 17 staa COPRST ; store it f644 3d rts ;___________________________________________________ ; ; Interrupt routines ; ; Selector knob routines ; f645 14 10 KEYINT: SEI ; PREVENT RECURSIVE IRQ S ; f647 4f 21 80 03 BRCLR KWIFD, BUT, NOTBUT f64b 72 08 72 INC BUTPR ; TEST SELECT BUTTON FIRST ; f64e 4f 21 20 0e NOTBUT: BRCLR KWIFD, FA, ISFB ; TEST IF PHASE A f652 4f 05 40 05 BRCLR PORTD, FB, NOTFAI f656 72 08 71 INC KNOBV f659 20 15 BRA NOTFN f65b 73 08 71 NOTFAI: DEC KNOBV f65e 20 10 BRA NOTFN ; f660 4f 21 40 0c ISFB: BRCLR KWIFD, FB, NOTFN ; TEST IF PHASE B f664 4f 05 20 05 BRCLR PORTD, FA, NOTFBD f668 73 08 71 DEC KNOBV f66b 20 03 BRA NOTFN f66d 72 08 71 NOTFBD: INC KNOBV ; f670 96 21 NOTFN: LDAA KWIFD f672 5a 21 STAA KWIFD ; RESET INTERRUPTS f674 a7 NOP f675 a7 NOP f676 10 ef CLI ; ENABLE INTERRUPTS f678 0b RTI ; ; ;_______________________________________________________ ; ; COMMAND STRINGS ; COMMAND1: ; READ DATA COMAND f679 05 FCB 5 ; NUMBER OF BYTES ; f67a f5 FCB $F5 f67b 57 FCB $57 f67c 01 FCB $01 f67d 00 FCB $00 f67e b3 FCB $B3 ; COMMAND CHECKSUM ; COMMAND2: ; CLEAR CODES COMMAND f67f 04 FCB 4 ; f680 f5 FCB $F5 f681 56 FCB $56 f682 0a FCB $0A f683 ab FCB $AB ; COMMAND CHECKSUM ; ; HEADER BYTES ; f684 f5 HE1: FCB $F5 f685 ab HE2: FCB $AB ; ; OTHER STRINGS ; f686 41 2f 44 20 ADTXT: FCC 'A/D ' f68a 00 FCB 0 f68b 46 61 75 6c 74 20 FAUTXT: FCC 'Fault COP interrupt ' 43 4f 50 20 69 6e 74 65 72 72 75 70 74 20 f69f 00 FCB 0 f6a0 43 73 3d CSTXT: FCC 'Cs=' f6a3 00 FCB 0 f6a4 4a 4e 20 41 4c 44 BANNER: FCC 'JN ALDL display 20.2.1999 v. 1.1' 4c 20 64 69 73 70 6c 61 79 20 32 30 2e 32 2e 31 39 39 39 20 76 2e 20 31 2e 31 f6c4 00 FCB 0 f6c5 66 6f 72 20 48 75 HUMTXT: FCC 'for Hummer TCM readout' 6d 6d 65 72 20 54 43 4d 20 72 65 61 64 6f 75 74 f6db 00 FCB 0 f6dc 20 20 SSTR: FCC ' ' ; 2 SPACES f6de 00 FCB 0 f6df 50 72 6f 6d 20 49 PRTXT: FCC 'Prom ID ' 44 20 f6e7 00 FCB 0 f6e8 42 61 74 74 2e 20 BTXT: FCC 'Batt. V ' 56 20 f6f0 00 FCB 0 f6f1 45 6e 67 20 52 50 ERTXT: FCC 'Eng RPM ' 4d 20 f6f9 00 FCB 0 f6fa 54 43 43 20 52 50 TRTXT: FCC 'TCC RPM ' 4d 20 f702 00 FCB 0 f703 49 6e 70 20 52 50 IRTXT: FCC 'Inp RPM ' 4d 20 f70b 00 FCB 0 f70c 4f 75 74 20 52 50 ORTXT: FCC 'Out RPM ' 4d 20 f714 00 FCB 0 f715 54 68 72 6f 20 25 TBTXT: FCC 'Thro % ' 20 f71c 00 FCB 0 f71d 54 2d 74 65 6d 70 TTTXT: FCC 'T-temp ' 20 f724 00 FCB 0 f725 56 53 70 65 65 64 VSTXT: FCC 'VSpeed ' 20 f72c 00 FCB 0 f72d 54 43 43 73 6c 70 TSTXT: FCC 'TCCslp ' 20 f734 00 FCB 0 f735 43 47 72 3d 20 CGTXT: FCC 'CGr= ' f73a 00 FCB 0 f73b 50 2f 4e 20 PTXT FCC 'P/N ' ; GEAR SELECTOR STRINGS f73f 00 FCB 0 f740 52 20 20 20 RTXT FCC 'R ' f744 00 FCB 0 f745 4f 44 20 20 ODTXT FCC 'OD ' f749 00 FCB 0 f74a 44 20 20 20 DTXT FCC 'D ' f74e 00 FCB 0 f74f 32 20 20 20 IITXT FCC '2 ' f753 00 FCB 0 f754 31 20 20 20 ITXT FCC '1 ' f758 00 FCB 0 f759 3f 3f 3f 20 XTXT FCC '??? ' ; UNKNOWN / ILLEGAL POSITION f75d 00 FCB 0 f75e 42 72 61 6b 65 5f BRRTXT FCC 'Brake_req ' 72 65 71 20 f768 00 FCB 0 f769 41 43 5f 72 65 71 ACRTXT FCC 'AC_req ' 20 f770 00 FCB 0 f771 42 72 61 6b 65 5f BRTXT FCC 'Brake_ON ' 4f 4e 20 f77a 00 FCB 0 f77b 41 43 5f 4f 4e 20 ACTXT FCC 'AC_ON ' f781 00 FCB 0 ; ;____________________________________ ; VECTORS ; fff2 ORG $FFF2 ;KEY INT VECTOR fff2 f6 45 IRQV FDB KEYINT fff4 f0 00 XIRQV FDB START fff6 f0 00 SWIV FDB START fff8 f0 00 TRAPV FDB START fffa f2 83 COPFAIV FDB FLT ;COP FAILURE RESTART fffc f2 83 COPCLOV FDB FLT ;COP CLOCK MONITOR RESTART fffe f0 00 RESETV FDB START ;RESTART VECTOR ; END Total errors: 0 Total warnings: 0